From patchwork Thu Mar 8 13:58:08 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 7171 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id E1E6A23E01 for ; Thu, 8 Mar 2012 13:58:14 +0000 (UTC) Received: from mail-yw0-f52.google.com (mail-yw0-f52.google.com [209.85.213.52]) by fiordland.canonical.com (Postfix) with ESMTP id A94DFA185EE for ; Thu, 8 Mar 2012 13:58:14 +0000 (UTC) Received: by yhpp61 with SMTP id p61so210678yhp.11 for ; Thu, 08 Mar 2012 05:58:14 -0800 (PST) Received: by 10.50.45.228 with SMTP id q4mr6735580igm.58.1331215094056; Thu, 08 Mar 2012 05:58:14 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.53.18 with SMTP id k18csp10057ibg; Thu, 8 Mar 2012 05:58:12 -0800 (PST) Received: by 10.216.135.219 with SMTP id u69mr3217619wei.89.1331215092073; Thu, 08 Mar 2012 05:58:12 -0800 (PST) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id o43si2473438weq.25.2012.03.08.05.58.11 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 08 Mar 2012 05:58:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1S5dr6-0007VD-V2; Thu, 08 Mar 2012 13:58:08 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Avi Kivity , Andrzej Zaborowski Subject: [PATCH] hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region Date: Thu, 8 Mar 2012 13:58:08 +0000 Message-Id: <1331215088-28816-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-Gm-Message-State: ALoCoQmViL9CH5FDctiiLDYzrSWwkmM4oWtO0ckX91fAAqsx0FIlkFKg8hzebOY/rpuYR4WsZjpJ The pxa2xx I2C controller can be at an arbitrary offset within its region (this is used because one of the controllers starts at offset 0x1600 into an 0x10000 sized region). The previous implementation of this included an adjustment which worked around the fact that memory region read/write functions were passed an offset from the start of a page rather than from the start of the region. Since commit 5312bd8b3 offsets are now from the start of the region and so we were applying an incorrect adjustment, resulting in warnings like "pxa2xx_i2c_read: Bad register 0xffffff90". Retain the offset handling but remove the adjustment to the page boundary. Signed-off-by: Peter Maydell Signed-off-by: Peter Maydell Reviewed-by: Andreas Färber --- hw/pxa2xx.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c index 1ab2701..d1efef4 100644 --- a/hw/pxa2xx.c +++ b/hw/pxa2xx.c @@ -1507,8 +1507,7 @@ PXA2xxI2CState *pxa2xx_i2c_init(target_phys_addr_t base, i2c_dev = sysbus_from_qdev(qdev_create(NULL, "pxa2xx_i2c")); qdev_prop_set_uint32(&i2c_dev->qdev, "size", region_size + 1); - qdev_prop_set_uint32(&i2c_dev->qdev, "offset", - base - (base & (~region_size) & TARGET_PAGE_MASK)); + qdev_prop_set_uint32(&i2c_dev->qdev, "offset", base & region_size); qdev_init_nofail(&i2c_dev->qdev);