From patchwork Thu Jul 26 14:35:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 10282 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 003542402A for ; Thu, 26 Jul 2012 14:56:45 +0000 (UTC) Received: from mail-yx0-f180.google.com (mail-yx0-f180.google.com [209.85.213.180]) by fiordland.canonical.com (Postfix) with ESMTP id A61E4A18F45 for ; Thu, 26 Jul 2012 14:56:45 +0000 (UTC) Received: by yenq6 with SMTP id q6so2054476yen.11 for ; Thu, 26 Jul 2012 07:56:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=WcvEitQilq28+EnTThcj/uzIX8i4UuhGWK2uXYLhUNI=; b=GxMkEC4zXPH6JpKT7gJsbaqCKNqL3DUtSsFlKgc4g78aAE/4w36fZMWdiAnRcI4NK1 /VzENHS+PMOiYqop/OSgMmXoCLS0FjtLFbFXmQEXO43VTFj0mrn+JTo79DepaNgRZLui 7QQZfPdhgTEoOZ+0YjnmmxxsAXPZxLQPl8KTOO226UvmeU+A5ThZZX+izjy3KFKzy9jS KLTauiu/fxyg8/fBEzMOb/rUe+gnO+BcqFbrHF0RUDKp9so2ZcGGGYiLYLK8nP7gLI3W 7AbCLicrv/8sNCOiTHfJHq6NqysFbwn9sH2QoXOMAKlyIc7vzgbbmGilZWwQUDyAHxf0 StKA== Received: by 10.50.182.229 with SMTP id eh5mr1893599igc.38.1343314604982; Thu, 26 Jul 2012 07:56:44 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.43.93.3 with SMTP id bs3csp143953icc; Thu, 26 Jul 2012 07:56:43 -0700 (PDT) Received: by 10.14.178.134 with SMTP id f6mr4462807eem.2.1343314602195; Thu, 26 Jul 2012 07:56:42 -0700 (PDT) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id u5si1063140eeo.17.2012.07.26.07.56.40 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 26 Jul 2012 07:56:42 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SuP9p-00073M-W2; Thu, 26 Jul 2012 15:35:17 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Avi Kivity , Marcelo Tosatti , Jan Kiszka , Alexander Graf Subject: [PATCH v2 1/7] kvm: Decouple 'async interrupt delivery' from 'kernel irqchip' Date: Thu, 26 Jul 2012 15:35:11 +0100 Message-Id: <1343313317-27087-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1343313317-27087-1-git-send-email-peter.maydell@linaro.org> References: <1343313317-27087-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQnShvJ1cdHCBYY8SVVhwz4SrAfFMhv7DAjSfdyFJDndCYX4llA22T9ogrtjoGJMe4v4NT8S On x86 userspace delivers interrupts to the kernel asynchronously (and therefore VCPU idle management is done in the kernel) if and only if there is an in-kernel irqchip. On other architectures this isn't necessarily true (they may always send interrupts asynchronously), so define a new kvm_async_interrupts_enabled() function instead of misusing kvm_irqchip_in_kernel(). Signed-off-by: Peter Maydell --- cpus.c | 3 ++- kvm-all.c | 7 ++++++- kvm-stub.c | 1 + kvm.h | 13 +++++++++++++ 4 files changed, 22 insertions(+), 2 deletions(-) diff --git a/cpus.c b/cpus.c index 756e624..8c54dd0 100644 --- a/cpus.c +++ b/cpus.c @@ -69,7 +69,8 @@ static bool cpu_thread_is_idle(CPUArchState *env) if (env->stopped || !runstate_is_running()) { return true; } - if (!env->halted || qemu_cpu_has_work(env) || kvm_irqchip_in_kernel()) { + if (!env->halted || qemu_cpu_has_work(env) || + kvm_async_interrupts_enabled()) { return false; } return true; diff --git a/kvm-all.c b/kvm-all.c index 2148b20..0a38ba1 100644 --- a/kvm-all.c +++ b/kvm-all.c @@ -100,6 +100,7 @@ struct KVMState KVMState *kvm_state; bool kvm_kernel_irqchip; +bool kvm_async_interrupts_allowed; static const KVMCapabilityInfo kvm_required_capabilites[] = { KVM_CAP_INFO(USER_MEMORY), @@ -857,7 +858,7 @@ int kvm_irqchip_set_irq(KVMState *s, int irq, int level) struct kvm_irq_level event; int ret; - assert(kvm_irqchip_in_kernel()); + assert(kvm_async_interrupts_enabled()); event.level = level; event.irq = irq; @@ -1201,6 +1202,10 @@ static int kvm_irqchip_create(KVMState *s) s->irqchip_inject_ioctl = KVM_IRQ_LINE_STATUS; } kvm_kernel_irqchip = true; + /* If we have an in-kernel IRQ chip then we must have asynchronous + * interrupt delivery (though the reverse is not necessarily true) + */ + kvm_async_interrupts_allowed = true; kvm_init_irq_routing(s); diff --git a/kvm-stub.c b/kvm-stub.c index d23b11c..a7a03e1 100644 --- a/kvm-stub.c +++ b/kvm-stub.c @@ -19,6 +19,7 @@ KVMState *kvm_state; bool kvm_kernel_irqchip; +bool kvm_async_interrupts_allowed; int kvm_init_vcpu(CPUArchState *env) { diff --git a/kvm.h b/kvm.h index 2617dd5..09818f3 100644 --- a/kvm.h +++ b/kvm.h @@ -24,13 +24,26 @@ extern int kvm_allowed; extern bool kvm_kernel_irqchip; +extern bool kvm_async_interrupts_allowed; #if defined CONFIG_KVM || !defined NEED_CPU_H #define kvm_enabled() (kvm_allowed) #define kvm_irqchip_in_kernel() (kvm_kernel_irqchip) + +/** + * kvm_async_interrupts_enabled: + * + * Returns: true if we can deliver interrupts to KVM + * asynchronously (ie by ioctl from any thread at any time) + * rather than having to do interrupt delivery synchronously + * (where the vcpu must be stopped at a suitable point first). + */ +#define kvm_async_interrupts_enabled() (kvm_async_interrupts_allowed) + #else #define kvm_enabled() (0) #define kvm_irqchip_in_kernel() (false) +#define kvm_async_interrupts_enabled() (false) #endif struct kvm_run;