From patchwork Thu Oct 18 13:11:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 12337 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id D46FB241AE for ; Thu, 18 Oct 2012 13:11:50 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 86ECDA1897F for ; Thu, 18 Oct 2012 13:11:50 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id e10so13185440iej.11 for ; Thu, 18 Oct 2012 06:11:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=arUztcuwFM2mgboK5C5lcts9HzgyghRxnrjS9qiIShM=; b=lUeYS/Tjfb8bG1yazRRg8eSdKeuzg4pp5gKQ1h1rIWtu+qz4vefJ0ZoWUKK8vmKjA5 rdwyq4Lk9QrhXzFgCQiXcSvySmONbr+s0S6uXGIHwTzn3fX5oPKn3H6EV5Kl+VoEiuBu zkSnhRZOHXHN0k6shTBrK4ybV51Al+b5z1n2jHxOKJLqdvfJY0sQxNZUcHV144z+9WXP 8PDPZMCA9Zf80vkGJ256AFoZAYDVAw7lIyAfiPWqdPEuC7CxrFXIUD2dkDfL3G97CVWO NfzZhcRJm1ybjSlHJkDjpXqlZ9o24bOwKjdEhIxJMAM1OLR+eHx5sEZJSQj3A0nNUL6J nqIA== Received: by 10.50.100.137 with SMTP id ey9mr4643518igb.57.1350565910298; Thu, 18 Oct 2012 06:11:50 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp1069417igt; Thu, 18 Oct 2012 06:11:46 -0700 (PDT) Received: by 10.180.86.65 with SMTP id n1mr10964779wiz.0.1350565905486; Thu, 18 Oct 2012 06:11:45 -0700 (PDT) Received: from mnementh.archaic.org.uk (38.0.169.217.in-addr.arpa. [217.169.0.38]) by mx.google.com with ESMTPS id a6si31566885wix.26.2012.10.18.06.11.44 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 18 Oct 2012 06:11:45 -0700 (PDT) Received-SPF: neutral (google.com: 217.169.0.38 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=217.169.0.38; Authentication-Results: mx.google.com; spf=neutral (google.com: 217.169.0.38 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1TOpt0-0006Ep-P5; Thu, 18 Oct 2012 14:11:42 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Blue Swirl Subject: [PATCH v2 8/8] hw/pl031: Use LOG_GUEST_ERROR Date: Thu, 18 Oct 2012 14:11:42 +0100 Message-Id: <1350565902-23940-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1350565902-23940-1-git-send-email-peter.maydell@linaro.org> References: <1350565902-23940-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQkSy6XTz+qQk/cAZjukhfw1nkPM7tycRSJR59tn+ceTCNLOs5bf09wNcslRjdSNQVAQmtcy Use LOG_GUEST_ERROR rather than hw_error or direct fprintf. Signed-off-by: Peter Maydell --- hw/pl031.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/hw/pl031.c b/hw/pl031.c index 9602664..6cbaf23 100644 --- a/hw/pl031.c +++ b/hw/pl031.c @@ -120,11 +120,13 @@ static uint64_t pl031_read(void *opaque, target_phys_addr_t offset, case RTC_MIS: return s->is & s->im; case RTC_ICR: - fprintf(stderr, "qemu: pl031_read: Unexpected offset 0x%x\n", - (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "pl031: read of write-only register at offset 0x%x\n", + (int)offset); break; default: - hw_error("pl031_read: Bad offset 0x%x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "pl031_read: Bad offset 0x%x\n", (int)offset); break; } @@ -167,12 +169,14 @@ static void pl031_write(void * opaque, target_phys_addr_t offset, case RTC_DR: case RTC_MIS: case RTC_RIS: - fprintf(stderr, "qemu: pl031_write: Unexpected offset 0x%x\n", - (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "pl031: write to read-only register at offset 0x%x\n", + (int)offset); break; default: - hw_error("pl031_write: Bad offset 0x%x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "pl031_write: Bad offset 0x%x\n", (int)offset); break; } }