From patchwork Tue Mar 26 10:22:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 15662 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 46A6C23E64 for ; Tue, 26 Mar 2013 10:43:15 +0000 (UTC) Received: from mail-vc0-f173.google.com (mail-vc0-f173.google.com [209.85.220.173]) by fiordland.canonical.com (Postfix) with ESMTP id 023F1A198D6 for ; Tue, 26 Mar 2013 10:43:14 +0000 (UTC) Received: by mail-vc0-f173.google.com with SMTP id gd11so5408400vcb.4 for ; Tue, 26 Mar 2013 03:43:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=3vUxidtBWW6kk1v6Kxh1pAgVomYbM8CCBQslFxrMXq4=; b=iwo3RERaKKrdzDcnRFuZr0LzVGQKZpal3UclYS5daEl8swGJzK1LRlRBME7obI4kGy nFZFnOYPj13nAkLmA5PdvA+0ysYF/cqo1F/NR+mjAqBTc4RVwdEgN+rH25bY5yxs89Rl nzEdqci0tPIKG15dxcElvZGDvRzyHqxvNSJ+a3y9BO9mODMX9J4EDruGSUz48SP9HhpQ 1TqkpqWtqVEatgHgBjNFFSEtliSdq6tNBpX33dPx5lEY+NhG2KFXxdtXZKyaaC9ELZ1f nNaDfffL8YVYHc6c3nn/YlLw6O7jQfKHhx9ug1MosTDThxjy9i3bHuzFetGchlNGDuqT XDPA== X-Received: by 10.220.153.143 with SMTP id k15mr19019777vcw.33.1364294594503; Tue, 26 Mar 2013 03:43:14 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.59.4.204 with SMTP id cg12csp65022ved; Tue, 26 Mar 2013 03:43:14 -0700 (PDT) X-Received: by 10.194.20.40 with SMTP id k8mr23875131wje.16.1364294593468; Tue, 26 Mar 2013 03:43:13 -0700 (PDT) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id b2si6371927wjf.96.2013.03.26.03.43.13 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 26 Mar 2013 03:43:13 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1UKR1A-0002HH-9H; Tue, 26 Mar 2013 10:22:12 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Arnd Bergmann , "Michael S. Tsirkin" , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Will Deacon , Paul Brook , Aurelien Jarno Subject: [PATCH v2 05/11] versatile_pci: Use separate PCI I/O space rather than system I/O space Date: Tue, 26 Mar 2013 10:22:05 +0000 Message-Id: <1364293331-8722-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1364293331-8722-1-git-send-email-peter.maydell@linaro.org> References: <1364293331-8722-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQldUQ0EVLcQ2o9hg5oNRFBPN05wNPv5XwJmEJlnRkrTY2ZX0Q9ABqwBJ9dVEiSlCy4+qunn Rather than overloading the system I/O space (which doesn't even make any sense on ARM) for PCI I/O, create an memory region in the PCI controller and use that to represent the I/O space. Signed-off-by: Peter Maydell --- hw/versatile_pci.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c index dfd3001..777e9b1 100644 --- a/hw/versatile_pci.c +++ b/hw/versatile_pci.c @@ -19,7 +19,8 @@ typedef struct { qemu_irq irq[4]; MemoryRegion mem_config; MemoryRegion mem_config2; - MemoryRegion isa; + MemoryRegion pci_io_space; + MemoryRegion pci_io_window; PCIBus pci_bus; PCIDevice pci_dev; @@ -77,8 +78,10 @@ static void pci_vpb_init(Object *obj) PCIHostState *h = PCI_HOST_BRIDGE(obj); PCIVPBState *s = PCI_VPB(obj); + memory_region_init(&s->pci_io_space, "pci_io", 1ULL << 32); + pci_bus_new_inplace(&s->pci_bus, DEVICE(obj), "pci", - get_system_memory(), get_system_io(), + get_system_memory(), &s->pci_io_space, PCI_DEVFN(11, 0)); h->bus = &s->pci_bus; @@ -111,8 +114,14 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp) memory_region_init_io(&s->mem_config2, &pci_vpb_config_ops, &s->pci_bus, "pci-vpb-config", 0x1000000); sysbus_init_mmio(sbd, &s->mem_config2); - isa_mmio_setup(&s->isa, 0x0100000); - sysbus_init_mmio(sbd, &s->isa); + + /* The window into I/O space is always into a fixed base address; + * its size is the same for both realview and versatile. + */ + memory_region_init_alias(&s->pci_io_window, "pci-vbp-io-window", + &s->pci_io_space, 0, 0x100000); + + sysbus_init_mmio(sbd, &s->pci_io_space); /* TODO Remove once realize propagates to child devices. */ object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp);