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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id n1si856161wib.27.2013.06.25.03.35.49 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 25 Jun 2013 03:35:50 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1UrQbA-0008Fx-CD; Tue, 25 Jun 2013 11:35:44 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Riku Voipio , Richard Henderson , "Edgar E. Iglesias" , Aurelien Jarno , Alexander Graf , Blue Swirl , Guan Xuetao , Jia Liu , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [PATCH] linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-user Date: Tue, 25 Jun 2013 11:35:44 +0100 Message-Id: <1372156544-31712-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-Gm-Message-State: ALoCoQkCcgu4IxE/lJKXU1JEavZPqZSAubyu9dbdN5lrr/fYDh5/36CUcKF/vCjDmWGwlxkXSdCa X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c01::231 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The functions cpu_clone_regs() and cpu_set_tls() are not purely CPU related -- they are specific to the TLS ABI for a a particular OS. Move them into the linux-user/ tree where they belong. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias --- The recent bsd-user patch series reminded me what a mess the current NPTL/threading status of linux-user is. I have some things in mind to clean it up (and maybe even actually get all targets up to having NPTL enabled, since it's mostly just implementing the two functions being moved here for x86, sparc, openrisc. Andreas, I hope this doesn't cut across anything you were planning for your QOM tree. NB: copyright/license headers for the new header files are taken from the cpu.h that the functions came from. In a couple of cases where cpu.h had no license header I used the one from the corresponding translate.c. linux-user/alpha/target_cpu.h | 36 +++++++++++++++++++++++++++++++ linux-user/arm/target_cpu.h | 35 ++++++++++++++++++++++++++++++ linux-user/cris/target_cpu.h | 36 +++++++++++++++++++++++++++++++ linux-user/i386/target_cpu.h | 10 +++++++++ linux-user/m68k/target_cpu.h | 34 ++++++++++++++++++++++++++++++ linux-user/microblaze/target_cpu.h | 35 ++++++++++++++++++++++++++++++ linux-user/mips/target_cpu.h | 36 +++++++++++++++++++++++++++++++ linux-user/mips64/target_cpu.h | 1 + linux-user/openrisc/target_cpu.h | 10 +++++++++ linux-user/ppc/target_cpu.h | 41 ++++++++++++++++++++++++++++++++++++ linux-user/qemu.h | 1 + linux-user/s390x/target_cpu.h | 39 ++++++++++++++++++++++++++++++++++ linux-user/sh4/target_cpu.h | 35 ++++++++++++++++++++++++++++++ linux-user/sparc/target_cpu.h | 36 +++++++++++++++++++++++++++++++ linux-user/sparc64/target_cpu.h | 1 + linux-user/unicore32/target_cpu.h | 27 ++++++++++++++++++++++++ linux-user/x86_64/target_cpu.h | 1 + target-alpha/cpu.h | 16 -------------- target-arm/cpu.h | 14 ------------ target-cris/cpu.h | 14 ------------ target-m68k/cpu.h | 9 -------- target-microblaze/cpu.h | 14 ------------ target-mips/cpu.h | 13 ------------ target-ppc/cpu.h | 20 ------------------ target-s390x/cpu.h | 16 -------------- target-sh4/cpu.h | 14 ------------ target-sparc/cpu.h | 12 ----------- target-unicore32/cpu.h | 13 ------------ 28 files changed, 414 insertions(+), 155 deletions(-) create mode 100644 linux-user/alpha/target_cpu.h create mode 100644 linux-user/arm/target_cpu.h create mode 100644 linux-user/cris/target_cpu.h create mode 100644 linux-user/i386/target_cpu.h create mode 100644 linux-user/m68k/target_cpu.h create mode 100644 linux-user/microblaze/target_cpu.h create mode 100644 linux-user/mips/target_cpu.h create mode 100644 linux-user/mips64/target_cpu.h create mode 100644 linux-user/openrisc/target_cpu.h create mode 100644 linux-user/ppc/target_cpu.h create mode 100644 linux-user/s390x/target_cpu.h create mode 100644 linux-user/sh4/target_cpu.h create mode 100644 linux-user/sparc/target_cpu.h create mode 100644 linux-user/sparc64/target_cpu.h create mode 100644 linux-user/unicore32/target_cpu.h create mode 100644 linux-user/x86_64/target_cpu.h diff --git a/linux-user/alpha/target_cpu.h b/linux-user/alpha/target_cpu.h new file mode 100644 index 0000000..4256245 --- /dev/null +++ b/linux-user/alpha/target_cpu.h @@ -0,0 +1,36 @@ +/* + * Alpha specific CPU ABI and functions for linux-user + * + * Copyright (c) 2007 Jocelyn Mayer + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPUAlphaState *env, target_ulong newsp) +{ + if (newsp) { + env->ir[IR_SP] = newsp; + } + env->ir[IR_V0] = 0; + env->ir[IR_A3] = 0; +} + +static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls) +{ + env->unique = newtls; +} + +#endif diff --git a/linux-user/arm/target_cpu.h b/linux-user/arm/target_cpu.h new file mode 100644 index 0000000..ed323c0 --- /dev/null +++ b/linux-user/arm/target_cpu.h @@ -0,0 +1,35 @@ +/* + * ARM specific CPU ABI and functions for linux-user + * + * Copyright (c) 2003 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp) +{ + if (newsp) { + env->regs[13] = newsp; + } + env->regs[0] = 0; +} + +static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls) +{ + env->cp15.c13_tls2 = newtls; +} + +#endif diff --git a/linux-user/cris/target_cpu.h b/linux-user/cris/target_cpu.h new file mode 100644 index 0000000..4d787e5 --- /dev/null +++ b/linux-user/cris/target_cpu.h @@ -0,0 +1,36 @@ +/* + * CRIS specific CPU ABI and functions for linux-user + * + * Copyright (c) 2007 AXIS Communications AB + * Written by Edgar E. Iglesias + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPUCRISState *env, target_ulong newsp) +{ + if (newsp) { + env->regs[14] = newsp; + } + env->regs[10] = 0; +} + +static inline void cpu_set_tls(CPUCRISState *env, target_ulong newtls) +{ + env->pregs[PR_PID] = (env->pregs[PR_PID] & 0xff) | newtls; +} + +#endif diff --git a/linux-user/i386/target_cpu.h b/linux-user/i386/target_cpu.h new file mode 100644 index 0000000..633e9ef --- /dev/null +++ b/linux-user/i386/target_cpu.h @@ -0,0 +1,10 @@ +/* + * i386 specific CPU ABI and functions for linux-user + */ + +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +/* TODO: need to implement cpu_clone_regs() and cpu_set_tls() */ + +#endif diff --git a/linux-user/m68k/target_cpu.h b/linux-user/m68k/target_cpu.h new file mode 100644 index 0000000..6d728d4 --- /dev/null +++ b/linux-user/m68k/target_cpu.h @@ -0,0 +1,34 @@ +/* + * m68k specific CPU ABI and functions for linux-user + * + * Copyright (c) 2005-2007 CodeSourcery + * Written by Paul Brook + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +/* TODO: need to implement cpu_set_tls() */ + +static inline void cpu_clone_regs(CPUM68KState *env, target_ulong newsp) +{ + if (newsp) { + env->aregs[7] = newsp; + } + env->dregs[0] = 0; +} + +#endif diff --git a/linux-user/microblaze/target_cpu.h b/linux-user/microblaze/target_cpu.h new file mode 100644 index 0000000..c6386ea --- /dev/null +++ b/linux-user/microblaze/target_cpu.h @@ -0,0 +1,35 @@ +/* + * MicroBlaze specific CPU ABI and functions for linux-user + * + * Copyright (c) 2009 Edgar E. Iglesias + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPUMBState *env, target_ulong newsp) +{ + if (newsp) { + env->regs[R_SP] = newsp; + } + env->regs[3] = 0; +} + +static inline void cpu_set_tls(CPUMBState *env, target_ulong newtls) +{ + env->regs[21] = newtls; +} + +#endif diff --git a/linux-user/mips/target_cpu.h b/linux-user/mips/target_cpu.h new file mode 100644 index 0000000..ba8e9eb --- /dev/null +++ b/linux-user/mips/target_cpu.h @@ -0,0 +1,36 @@ +/* + * MIPS specific CPU ABI and functions for linux-user + * + * Copyright (c) 2004-2005 Jocelyn Mayer + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPUMIPSState *env, target_ulong newsp) +{ + if (newsp) { + env->active_tc.gpr[29] = newsp; + } + env->active_tc.gpr[7] = 0; + env->active_tc.gpr[2] = 0; +} + +static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls) +{ + env->tls_value = newtls; +} + +#endif diff --git a/linux-user/mips64/target_cpu.h b/linux-user/mips64/target_cpu.h new file mode 100644 index 0000000..fa36407 --- /dev/null +++ b/linux-user/mips64/target_cpu.h @@ -0,0 +1 @@ +#include "../mips/target_cpu.h" diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/openrisc/target_cpu.h new file mode 100644 index 0000000..9140fbb --- /dev/null +++ b/linux-user/openrisc/target_cpu.h @@ -0,0 +1,10 @@ +/* + * OpenRISC specific CPU ABI and functions for linux-user + */ + +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +/* TODO: need to implement cpu_clone_regs() and cpu_set_tls() */ + +#endif diff --git a/linux-user/ppc/target_cpu.h b/linux-user/ppc/target_cpu.h new file mode 100644 index 0000000..9cc0c3b --- /dev/null +++ b/linux-user/ppc/target_cpu.h @@ -0,0 +1,41 @@ +/* + * PowerPC specific CPU ABI and functions for linux-user + * + * Copyright (c) 2003-2007 Jocelyn Mayer + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPUPPCState *env, target_ulong newsp) +{ + if (newsp) { + env->gpr[1] = newsp; + } + env->gpr[3] = 0; +} + +static inline void cpu_set_tls(CPUPPCState *env, target_ulong newtls) +{ +#if defined(TARGET_PPC64) + /* The kernel checks TIF_32BIT here; we don't support loading 32-bit + binaries on PPC64 yet. */ + env->gpr[13] = newtls; +#else + env->gpr[2] = newtls; +#endif +} + +#endif diff --git a/linux-user/qemu.h b/linux-user/qemu.h index b10e957..20d171c 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -16,6 +16,7 @@ #include "exec/user/thunk.h" #include "syscall_defs.h" #include "syscall.h" +#include "target_cpu.h" #include "target_signal.h" #include "exec/gdbstub.h" #include "qemu/queue.h" diff --git a/linux-user/s390x/target_cpu.h b/linux-user/s390x/target_cpu.h new file mode 100644 index 0000000..f10abe8 --- /dev/null +++ b/linux-user/s390x/target_cpu.h @@ -0,0 +1,39 @@ +/* + * S/390 specific CPU ABI and functions for linux-user + * + * Copyright (c) 2009 Ulrich Hecht + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * Contributions after 2012-10-29 are licensed under the terms of the + * GNU GPL, version 2 or (at your option) any later version. + * + * You should have received a copy of the GNU (Lesser) General Public + * License along with this library; if not, see . + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPUS390XState *env, target_ulong newsp) +{ + if (newsp) { + env->regs[15] = newsp; + } + env->regs[2] = 0; +} + +static inline void cpu_set_tls(CPUS390XState *env, target_ulong newtls) +{ + env->aregs[0] = newtls >> 32; + env->aregs[1] = newtls & 0xffffffffULL; +} + +#endif diff --git a/linux-user/sh4/target_cpu.h b/linux-user/sh4/target_cpu.h new file mode 100644 index 0000000..141856f --- /dev/null +++ b/linux-user/sh4/target_cpu.h @@ -0,0 +1,35 @@ +/* + * SH4 specific CPU ABI and functions for linux-user + * + * Copyright (c) 2005 Samuel Tardieu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPUSH4State *env, target_ulong newsp) +{ + if (newsp) { + env->gregs[15] = newsp; + } + env->gregs[0] = 0; +} + +static inline void cpu_set_tls(CPUSH4State *env, target_ulong newtls) +{ + env->gbr = newtls; +} + +#endif diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h new file mode 100644 index 0000000..4030bac --- /dev/null +++ b/linux-user/sparc/target_cpu.h @@ -0,0 +1,36 @@ +/* + * SPARC specific CPU ABI and functions for linux-user + * + * Copyright (C) 2003 Thomas M. Ogrisegg + * Copyright (C) 2003-2005 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +/* TODO: implement cpu_set_tls, check cpu_clone_regs */ + +static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp) +{ + if (newsp) { + env->regwptr[22] = newsp; + } + env->regwptr[0] = 0; + /* FIXME: Do we also need to clear CF? */ + /* XXXXX */ + printf("HELPME: %s:%d\n", __FILE__, __LINE__); +} + +#endif diff --git a/linux-user/sparc64/target_cpu.h b/linux-user/sparc64/target_cpu.h new file mode 100644 index 0000000..b22263d --- /dev/null +++ b/linux-user/sparc64/target_cpu.h @@ -0,0 +1 @@ +#include "../sparc/target_cpu.h" diff --git a/linux-user/unicore32/target_cpu.h b/linux-user/unicore32/target_cpu.h new file mode 100644 index 0000000..fb79087 --- /dev/null +++ b/linux-user/unicore32/target_cpu.h @@ -0,0 +1,27 @@ +/* + * UniCore32 specific CPU ABI and functions for linux-user + * + * Copyright (C) 2010-2012 Guan Xuetao + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation, or (at your option) any + * later version. See the COPYING file in the top-level directory. + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPUUniCore32State *env, target_ulong newsp) +{ + if (newsp) { + env->regs[29] = newsp; + } + env->regs[0] = 0; +} + +static inline void cpu_set_tls(CPUUniCore32State *env, target_ulong newtls) +{ + env->regs[16] = newtls; +} + +#endif diff --git a/linux-user/x86_64/target_cpu.h b/linux-user/x86_64/target_cpu.h new file mode 100644 index 0000000..9ec7cbb --- /dev/null +++ b/linux-user/x86_64/target_cpu.h @@ -0,0 +1 @@ +#include "../i386/target_cpu.h" diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index 2156a1e..b4fb6ce 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -498,22 +498,6 @@ static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, target_ulong *pc, *pflags = flags; } -#if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUAlphaState *env, target_ulong newsp) -{ - if (newsp) { - env->ir[IR_SP] = newsp; - } - env->ir[IR_V0] = 0; - env->ir[IR_A3] = 0; -} - -static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls) -{ - env->unique = newtls; -} -#endif - static inline bool cpu_has_work(CPUState *cpu) { /* Here we are checking to see if the CPU should wake up from HALT. diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 5438444..d168c2e 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -249,11 +249,6 @@ int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address, int rw, int mmu_idx); #define cpu_handle_mmu_fault cpu_arm_handle_mmu_fault -static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls) -{ - env->cp15.c13_tls2 = newtls; -} - #define CPSR_M (0x1f) #define CPSR_T (1 << 5) #define CPSR_F (1 << 6) @@ -649,15 +644,6 @@ static inline int cpu_mmu_index (CPUARMState *env) return (env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR ? 1 : 0; } -#if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp) -{ - if (newsp) - env->regs[13] = newsp; - env->regs[0] = 0; -} -#endif - #include "exec/cpu-all.h" /* Bit usage in the TB flags field: */ diff --git a/target-cris/cpu.h b/target-cris/cpu.h index dbd7d36..c12a8ca 100644 --- a/target-cris/cpu.h +++ b/target-cris/cpu.h @@ -247,20 +247,6 @@ int cpu_cris_handle_mmu_fault(CPUCRISState *env, target_ulong address, int rw, int mmu_idx); #define cpu_handle_mmu_fault cpu_cris_handle_mmu_fault -#if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUCRISState *env, target_ulong newsp) -{ - if (newsp) - env->regs[14] = newsp; - env->regs[10] = 0; -} -#endif - -static inline void cpu_set_tls(CPUCRISState *env, target_ulong newtls) -{ - env->pregs[PR_PID] = (env->pregs[PR_PID] & 0xff) | newtls; -} - /* Support function regs. */ #define SFR_RW_GC_CFG 0][0 #define SFR_RW_MM_CFG env->pregs[PR_SRS]][0 diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index c90c40c..9fdf89e 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -241,15 +241,6 @@ int cpu_m68k_handle_mmu_fault(CPUM68KState *env, target_ulong address, int rw, int mmu_idx); #define cpu_handle_mmu_fault cpu_m68k_handle_mmu_fault -#if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUM68KState *env, target_ulong newsp) -{ - if (newsp) - env->aregs[7] = newsp; - env->dregs[0] = 0; -} -#endif - #include "exec/cpu-all.h" static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc, diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index 1813939..4f7ce9d 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -331,20 +331,6 @@ int cpu_mb_handle_mmu_fault(CPUMBState *env, target_ulong address, int rw, int mmu_idx); #define cpu_handle_mmu_fault cpu_mb_handle_mmu_fault -#if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUMBState *env, target_ulong newsp) -{ - if (newsp) - env->regs[R_SP] = newsp; - env->regs[3] = 0; -} -#endif - -static inline void cpu_set_tls(CPUMBState *env, target_ulong newtls) -{ - env->regs[21] = newtls; -} - static inline int cpu_interrupts_enabled(CPUMBState *env) { return env->sregs[SR_MSR] & MSR_IE; diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 6e761e0..181d1e1 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -520,14 +520,6 @@ static inline int cpu_mmu_index (CPUMIPSState *env) return env->hflags & MIPS_HFLAG_KSU; } -static inline void cpu_clone_regs(CPUMIPSState *env, target_ulong newsp) -{ - if (newsp) - env->active_tc.gpr[29] = newsp; - env->active_tc.gpr[7] = 0; - env->active_tc.gpr[2] = 0; -} - static inline int cpu_mips_hw_interrupts_pending(CPUMIPSState *env) { int32_t pending; @@ -678,11 +670,6 @@ static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc, *flags = env->hflags & (MIPS_HFLAG_TMASK | MIPS_HFLAG_BMASK); } -static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls) -{ - env->tls_value = newtls; -} - static inline int mips_vpe_active(CPUMIPSState *env) { int active = 1; diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index aa1d013..13137ce 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1186,15 +1186,6 @@ static inline int cpu_mmu_index (CPUPPCState *env) return env->mmu_idx; } -#if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUPPCState *env, target_ulong newsp) -{ - if (newsp) - env->gpr[1] = newsp; - env->gpr[3] = 0; -} -#endif - #include "exec/cpu-all.h" /*****************************************************************************/ @@ -2034,17 +2025,6 @@ static inline void cpu_get_tb_cpu_state(CPUPPCState *env, target_ulong *pc, *flags = env->hflags; } -static inline void cpu_set_tls(CPUPPCState *env, target_ulong newtls) -{ -#if defined(TARGET_PPC64) - /* The kernel checks TIF_32BIT here; we don't support loading 32-bit - binaries on PPC64 yet. */ - env->gpr[13] = newtls; -#else - env->gpr[2] = newtls; -#endif -} - #if !defined(CONFIG_USER_ONLY) static inline int booke206_tlbm_id(CPUPPCState *env, ppcmas_tlb_t *tlbm) { diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index 0ce82cf..be1a0c2 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -149,16 +149,6 @@ typedef struct CPUS390XState { #include "cpu-qom.h" -#if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUS390XState *env, target_ulong newsp) -{ - if (newsp) { - env->regs[15] = newsp; - } - env->regs[2] = 0; -} -#endif - /* distinguish between 24 bit and 31 bit addressing */ #define HIGH_ORDER_BIT 0x80000000 @@ -515,12 +505,6 @@ static inline bool css_present(uint8_t cssid) } #endif -static inline void cpu_set_tls(CPUS390XState *env, target_ulong newtls) -{ - env->aregs[0] = newtls >> 32; - env->aregs[1] = newtls & 0xffffffffULL; -} - #define cpu_init(model) (&cpu_s390x_init(model)->env) #define cpu_exec cpu_s390x_exec #define cpu_gen_code cpu_s390x_gen_code diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index fd7da92..c8df18b 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -220,11 +220,6 @@ void cpu_sh4_write_mmaped_utlb_data(CPUSH4State *s, hwaddr addr, int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr); -static inline void cpu_set_tls(CPUSH4State *env, target_ulong newtls) -{ - env->gbr = newtls; -} - void cpu_load_tlb(CPUSH4State * env); static inline CPUSH4State *cpu_init(const char *cpu_model) @@ -250,15 +245,6 @@ static inline int cpu_mmu_index (CPUSH4State *env) return (env->sr & SR_MD) == 0 ? 1 : 0; } -#if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUSH4State *env, target_ulong newsp) -{ - if (newsp) - env->gregs[15] = newsp; - env->gregs[0] = 0; -} -#endif - #include "exec/cpu-all.h" /* Memory access type */ diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 6fa7778..ae1066b 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -689,18 +689,6 @@ static inline int cpu_pil_allowed(CPUSPARCState *env1, int pil) #endif } -#if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp) -{ - if (newsp) - env->regwptr[22] = newsp; - env->regwptr[0] = 0; - /* FIXME: Do we also need to clear CF? */ - /* XXXXX */ - printf ("HELPME: %s:%d\n", __FILE__, __LINE__); -} -#endif - #include "exec/cpu-all.h" #ifdef TARGET_SPARC64 diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h index 5b2b9d1..d4be525 100644 --- a/target-unicore32/cpu.h +++ b/target-unicore32/cpu.h @@ -142,19 +142,6 @@ static inline int cpu_mmu_index(CPUUniCore32State *env) return (env->uncached_asr & ASR_M) == ASR_MODE_USER ? 1 : 0; } -static inline void cpu_clone_regs(CPUUniCore32State *env, target_ulong newsp) -{ - if (newsp) { - env->regs[29] = newsp; - } - env->regs[0] = 0; -} - -static inline void cpu_set_tls(CPUUniCore32State *env, target_ulong newtls) -{ - env->regs[16] = newtls; -} - #include "exec/cpu-all.h" #include "cpu-qom.h" #include "exec/exec-all.h"