From patchwork Fri Jul 5 13:54:41 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 18270 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-gh0-f200.google.com (mail-gh0-f200.google.com [209.85.160.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id D822125E04 for ; Fri, 5 Jul 2013 13:54:46 +0000 (UTC) Received: by mail-gh0-f200.google.com with SMTP id 10sf2600078ghy.7 for ; Fri, 05 Jul 2013 06:54:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:x-beenthere:x-forwarded-to:x-forwarded-for :delivered-to:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-google-group-id:list-post:list-help:list-archive:list-unsubscribe; bh=N3UKMWsCcF72EwqxPkuaUuoRBE9GdkwGDLe9Jr7LXGk=; b=GEp9Zl9UhKguMvngMF/A4le78gvUWuL9zMt2ED+VMi1Jc2ZdiQG0AuBzFUvhlhY9Z3 7WPx1f/dJjpJKR73qBX6WZCJcmsVbGox13o/tMxUwDjaSX1W+OkZgG8A59I12CyHZRsx 49HVdx0hTYM+qdy1wEdmYW82EPXjMLe5E2S6WxlDRylWUqAy8nFNECtZMaQC72k4ODXX G5fX9Gnqd2xaDQr9j9o0srVW9wuL0RpSu+RIheatUYCn6zprBb9/rpZZ7t0xO050U/kQ xu8DKdWvx9hcuWYG0Xyjike8L3T37JUwJiEtkJygqClrX90HB+yj7SC1Ju+X/uI0vv27 YSQQ== X-Received: by 10.236.91.173 with SMTP id h33mr5331297yhf.17.1373032485799; Fri, 05 Jul 2013 06:54:45 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.39.201 with SMTP id r9ls988435qek.72.gmail; Fri, 05 Jul 2013 06:54:45 -0700 (PDT) X-Received: by 10.58.118.8 with SMTP id ki8mr6716858veb.84.1373032485582; Fri, 05 Jul 2013 06:54:45 -0700 (PDT) Received: from mail-vb0-f44.google.com (mail-vb0-f44.google.com [209.85.212.44]) by mx.google.com with ESMTPS id u4si2304605ven.86.2013.07.05.06.54.45 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 05 Jul 2013 06:54:45 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.212.44 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.212.44; Received: by mail-vb0-f44.google.com with SMTP id e15so1732591vbg.31 for ; Fri, 05 Jul 2013 06:54:45 -0700 (PDT) X-Received: by 10.220.164.138 with SMTP id e10mr6862134vcy.27.1373032485488; Fri, 05 Jul 2013 06:54:45 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.149.77 with SMTP id s13csp55974vcv; Fri, 5 Jul 2013 06:54:44 -0700 (PDT) X-Received: by 10.14.149.2 with SMTP id w2mr12136552eej.126.1373032484453; Fri, 05 Jul 2013 06:54:44 -0700 (PDT) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id a41si6384450eew.326.2013.07.05.06.54.43 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 05 Jul 2013 06:54:44 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Uv6TB-0003yv-Tt; Fri, 05 Jul 2013 14:54:41 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Christoffer Dall , Andre Przywara Subject: [PATCH] hw/cpu/a15mpcore: Correct default value for num-irq Date: Fri, 5 Jul 2013 14:54:41 +0100 Message-Id: <1373032481-15280-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-Gm-Message-State: ALoCoQlBHDWFEuNlqcFfiqCEkwVxYpmOd9LpqLdboWhzdEw0sMOk8lGKrRBiHBVgjx9XKzUPkBxE X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.44 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The a15mpcore device claims that its default value for num-irq is the number of interrupts used by the A15MP in the vexpress-a15 board. However that chip has 128 external interrupts, not 64. Since there is only one A15 based model in QEMU currently, we can fix this by simply changing the default value. This error was causing recent (3.10) Linux kernels to print warnings/backtraces when the number of interrupts reported by the GIC was smaller than an interrupt number they wanted to use. Signed-off-by: Peter Maydell --- Conveniently, 160 is also the correct value for the A15 in the Midway SoC, so this actually preemptively fixes a bug in the midway patches currently on list :-) Thanks to Christoffer Dall for tracking down what was happening here. hw/cpu/a15mpcore.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index 648656d..a902281 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -81,12 +81,12 @@ static int a15mp_priv_init(SysBusDevice *dev) static Property a15mp_priv_properties[] = { DEFINE_PROP_UINT32("num-cpu", A15MPPrivState, num_cpu, 1), /* The Cortex-A15MP may have anything from 0 to 224 external interrupt - * IRQ lines (with another 32 internal). We default to 64+32, which + * IRQ lines (with another 32 internal). We default to 128+32, which * is the number provided by the Cortex-A15MP test chip in the * Versatile Express A15 development board. * Other boards may differ and should set this property appropriately. */ - DEFINE_PROP_UINT32("num-irq", A15MPPrivState, num_irq, 96), + DEFINE_PROP_UINT32("num-irq", A15MPPrivState, num_irq, 160), DEFINE_PROP_END_OF_LIST(), };