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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id s4si9560477qan.123.2014.03.10.08.13.12 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 10 Mar 2014 08:13:12 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:49316 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WN1t9-0004ZU-Kb for patch@linaro.org; Mon, 10 Mar 2014 11:13:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50511) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WN1pb-0008M4-TP for qemu-devel@nongnu.org; Mon, 10 Mar 2014 11:09:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WN1pa-0004Y8-UP for qemu-devel@nongnu.org; Mon, 10 Mar 2014 11:09:31 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:46618) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WN1pa-0004Xm-Nb for qemu-devel@nongnu.org; Mon, 10 Mar 2014 11:09:30 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WN1pQ-0002N9-D1; Mon, 10 Mar 2014 15:09:20 +0000 From: Peter Maydell To: Anthony Liguori Date: Mon, 10 Mar 2014 15:09:16 +0000 Message-Id: <1394464160-9074-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1394464160-9074-1-git-send-email-peter.maydell@linaro.org> References: <1394464160-9074-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: Blue Swirl , qemu-devel@nongnu.org, Aurelien Jarno Subject: [Qemu-devel] [PULL 5/9] pxa2xx: Don't shift into sign bit X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Add missing 'U' suffixes to avoid potentially shifting into the sign bit of a signed integer. Signed-off-by: Peter Maydell Message-id: 1392988008-15938-2-git-send-email-peter.maydell@linaro.org --- hw/arm/pxa2xx.c | 6 +++--- hw/arm/pxa2xx_gpio.c | 2 +- hw/arm/pxa2xx_pic.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 904277a..0429148 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -259,7 +259,7 @@ static void pxa2xx_pwrmode_write(CPUARMState *env, const ARMCPRegInfo *ri, case 1: /* Idle */ - if (!(s->cm_regs[CCCR >> 2] & (1 << 31))) { /* CPDIS */ + if (!(s->cm_regs[CCCR >> 2] & (1U << 31))) { /* CPDIS */ cpu_interrupt(CPU(s->cpu), CPU_INTERRUPT_HALT); break; } @@ -496,7 +496,7 @@ typedef struct { #define SSCR0_SSE (1 << 7) #define SSCR0_RIM (1 << 22) #define SSCR0_TIM (1 << 23) -#define SSCR0_MOD (1 << 31) +#define SSCR0_MOD (1U << 31) #define SSCR0_DSS(x) (((((x) >> 16) & 0x10) | ((x) & 0xf)) + 1) #define SSCR1_RIE (1 << 0) #define SSCR1_TIE (1 << 1) @@ -1006,7 +1006,7 @@ static void pxa2xx_rtc_write(void *opaque, hwaddr addr, switch (addr) { case RTTR: - if (!(s->rttr & (1 << 31))) { + if (!(s->rttr & (1U << 31))) { pxa2xx_rtc_hzupdate(s); s->rttr = value; pxa2xx_rtc_alarm_update(s, s->rtsr); diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index ca77f56..0727428 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -110,7 +110,7 @@ static void pxa2xx_gpio_set(void *opaque, int line, int level) } bank = line >> 5; - mask = 1 << (line & 31); + mask = 1U << (line & 31); if (level) { s->status[bank] |= s->rising[bank] & mask & diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index 345fa4a..d37fb54 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -105,7 +105,7 @@ static inline uint32_t pxa2xx_pic_highest(PXA2xxPICState *s) { for (i = PXA2XX_PIC_SRCS - 1; i >= 0; i --) { irq = s->priority[i] & 0x3f; - if ((s->priority[i] & (1 << 31)) && irq < PXA2XX_PIC_SRCS) { + if ((s->priority[i] & (1U << 31)) && irq < PXA2XX_PIC_SRCS) { /* Source peripheral ID is valid. */ bit = 1 << (irq & 31); int_set = (irq >= 32); @@ -119,7 +119,7 @@ static inline uint32_t pxa2xx_pic_highest(PXA2xxPICState *s) { if (mask[int_set] & bit & ~s->is_fiq[int_set]) { /* IRQ asserted */ ichp &= 0x0000ffff; - ichp |= (1 << 31) | (irq << 16); + ichp |= (1U << 31) | (irq << 16); } } }