From patchwork Wed Mar 26 14:37:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 27141 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f69.google.com (mail-oa0-f69.google.com [209.85.219.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 0751B20062 for ; Wed, 26 Mar 2014 14:59:37 +0000 (UTC) Received: by mail-oa0-f69.google.com with SMTP id i7sf7825372oag.8 for ; Wed, 26 Mar 2014 07:59:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:date:message-id:in-reply-to :references:mime-version:cc:subject:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list:content-type :content-transfer-encoding; bh=lDtXLEhht2srCXzN2AVvxcF/jxNkC6Z15xxZvH3BTdg=; b=aa3a1/zjY/L5RglR3yQnFxjUUjgCFMQWrxbdy+g88LLlTvP4tVrPzE5sFpIsufNshx eYPf4HjHi/stbx598T+cMjdDr4mVqsPiqwV8WGOqgdl1vb8STrkeLWuUmqKDwuFSgtsF Kn3j8Y7w5VLAPUK031dzXnBZmTcWjUG9rIxaJHA8gFSTvuicrXmsfUaY/enoph1Lo3RR 7+cPn0Zcj3nwlgwz6X4sTH2G1uFHjqESryK99Yeou/hdPy4WoIQQfbZEHMBzPDHuegEt QheEDOf9DOoa1qd4JBqWyxf08Ai1/gpgjuGPkO4mcX5Y+bB33M5MFd5JbUvlLCtOpKDj iQYQ== X-Gm-Message-State: ALoCoQlQ28Wiv4TTbCPtpIa5YCGtXaOT+pqQ1Dyn3T7y+NVyqSmiCnRs+Bmu9X/+/zZcyh/zxrxo X-Received: by 10.43.14.137 with SMTP id pq9mr27672428icb.12.1395845977314; Wed, 26 Mar 2014 07:59:37 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.82.16 with SMTP id g16ls689154qgd.25.gmail; Wed, 26 Mar 2014 07:59:37 -0700 (PDT) X-Received: by 10.220.83.4 with SMTP id d4mr408300vcl.39.1395845977028; Wed, 26 Mar 2014 07:59:37 -0700 (PDT) Received: from mail-vc0-f180.google.com (mail-vc0-f180.google.com [209.85.220.180]) by mx.google.com with ESMTPS id fn10si4687936vdc.63.2014.03.26.07.59.37 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 26 Mar 2014 07:59:37 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.180; Received: by mail-vc0-f180.google.com with SMTP id lf12so2555736vcb.11 for ; Wed, 26 Mar 2014 07:59:37 -0700 (PDT) X-Received: by 10.52.108.164 with SMTP id hl4mr11019802vdb.25.1395845976928; Wed, 26 Mar 2014 07:59:36 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.78.9 with SMTP id i9csp52893vck; Wed, 26 Mar 2014 07:59:36 -0700 (PDT) X-Received: by 10.224.127.200 with SMTP id h8mr14562684qas.13.1395845975915; Wed, 26 Mar 2014 07:59:35 -0700 (PDT) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id s49si12820701qge.66.2014.03.26.07.59.35 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 26 Mar 2014 07:59:35 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:48410 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WSoyY-0002Dw-Sp for patch@linaro.org; Wed, 26 Mar 2014 10:38:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57687) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WSoxS-0000w4-GA for qemu-devel@nongnu.org; Wed, 26 Mar 2014 10:37:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WSoxN-0004Gw-IL for qemu-devel@nongnu.org; Wed, 26 Mar 2014 10:37:34 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:60825 helo=socrates.bennee.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WSoxN-0004Gq-8T for qemu-devel@nongnu.org; Wed, 26 Mar 2014 10:37:29 -0400 Received: from localhost ([127.0.0.1] helo=zen.linaro.local) by socrates.bennee.com with esmtp (Exim 4.80) (envelope-from ) id 1WSoxk-00040a-BX; Wed, 26 Mar 2014 15:37:52 +0100 From: alex.bennee@linaro.org To: qemu-devel@nongnu.org Date: Wed, 26 Mar 2014 14:37:14 +0000 Message-Id: <1395844634-11729-5-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1395844634-11729-1-git-send-email-alex.bennee@linaro.org> References: <1395844634-11729-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 88.198.71.155 Cc: "Edgar E. Iglesias" , Peter Maydell , Alexander Graf , Michael Walle , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Subject: [Qemu-devel] [RFC PATCH 4/4] qemu-log: make in_asm, out_asm and op_opt understand dfilter X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: alex.bennee@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Alex Bennée This ensures the code generation debug code will honour -dfilter if set. diff --git a/cpu-exec.c b/cpu-exec.c index 0914d3c..9aa3f3f 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -610,7 +610,7 @@ int cpu_exec(CPUArchState *env) next_tb = 0; tcg_ctx.tb_ctx.tb_invalidated_flag = 0; } - if (qemu_loglevel_mask(CPU_LOG_EXEC)) { + if (qemu_loglevel_mask(CPU_LOG_EXEC) && qemu_log_in_addr_range(tb->pc)) { qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n", tb->tc_ptr, tb->pc, lookup_symbol(tb->pc)); } diff --git a/tcg/tcg.c b/tcg/tcg.c index f1e0763..57d2b82 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2452,8 +2452,8 @@ static void dump_op_count(void) #endif -static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, - long search_pc) +static inline int tcg_gen_code_common(TCGContext *s, uint64_t target_pc, + uint8_t *gen_code_buf, long search_pc) { TCGOpcode opc; int op_index; @@ -2461,7 +2461,8 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, const TCGArg *args; #ifdef DEBUG_DISAS - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP) + && qemu_log_in_addr_range(target_pc))) { qemu_log("OP:\n"); tcg_dump_ops(s); qemu_log("\n"); @@ -2489,7 +2490,8 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, #endif #ifdef DEBUG_DISAS - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT) + && qemu_log_in_addr_range(target_pc))) { qemu_log("OP after optimization and liveness analysis:\n"); tcg_dump_ops(s); qemu_log("\n"); @@ -2512,11 +2514,6 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, tcg_table_op_count[opc]++; #endif def = &tcg_op_defs[opc]; -#if 0 - printf("%s: %d %d %d\n", def->name, - def->nb_oargs, def->nb_iargs, def->nb_cargs); - // dump_regs(s); -#endif switch(opc) { case INDEX_op_mov_i32: case INDEX_op_mov_i64: @@ -2581,7 +2578,7 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, return -1; } -int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf) +int tcg_gen_code(TCGContext *s, uint64_t target_pc, uint8_t *gen_code_buf) { #ifdef CONFIG_PROFILER { @@ -2597,7 +2594,7 @@ int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf) } #endif - tcg_gen_code_common(s, gen_code_buf, -1); + tcg_gen_code_common(s, target_pc, gen_code_buf, -1); /* flush instruction cache */ flush_icache_range((uintptr_t)gen_code_buf, (uintptr_t)s->code_ptr); @@ -2609,9 +2606,10 @@ int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf) offset bytes from the start of the TB. The contents of gen_code_buf must not be changed, though writing the same values is ok. Return -1 if not found. */ -int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset) +int tcg_gen_code_search_pc(TCGContext *s, uint64_t tpc, + uint8_t *gen_code_buf, long offset) { - return tcg_gen_code_common(s, gen_code_buf, offset); + return tcg_gen_code_common(s, tpc, gen_code_buf, offset); } #ifdef CONFIG_PROFILER diff --git a/tcg/tcg.h b/tcg/tcg.h index f7efcb4..9200a25 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -559,8 +559,9 @@ void tcg_context_init(TCGContext *s); void tcg_prologue_init(TCGContext *s); void tcg_func_start(TCGContext *s); -int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf); -int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset); +int tcg_gen_code(TCGContext *s, uint64_t tpc, uint8_t *gen_code_buf); +int tcg_gen_code_search_pc(TCGContext *s, uint64_t tpc, + uint8_t *gen_code_buf, long offset); void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size); diff --git a/translate-all.c b/translate-all.c index f243c10..7596b9c 100644 --- a/translate-all.c +++ b/translate-all.c @@ -176,7 +176,7 @@ int cpu_gen_code(CPUArchState *env, TranslationBlock *tb, int *gen_code_size_ptr s->interm_time += profile_getclock() - ti; s->code_time -= profile_getclock(); #endif - gen_code_size = tcg_gen_code(s, gen_code_buf); + gen_code_size = tcg_gen_code(s, tb->pc, gen_code_buf); *gen_code_size_ptr = gen_code_size; #ifdef CONFIG_PROFILER s->code_time += profile_getclock(); @@ -185,7 +185,8 @@ int cpu_gen_code(CPUArchState *env, TranslationBlock *tb, int *gen_code_size_ptr #endif #ifdef DEBUG_DISAS - if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { + if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM) + && qemu_log_in_addr_range(tb->pc)) { qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr); log_disas(tb->tc_ptr, *gen_code_size_ptr); qemu_log("\n"); @@ -235,7 +236,7 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb, s->tb_jmp_offset = NULL; s->tb_next = tb->tb_next; #endif - j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr); + j = tcg_gen_code_search_pc(s, tb->pc, (uint8_t *)tc_ptr, searched_pc - tc_ptr); if (j < 0) return -1; /* now find start of instruction before */