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[72.48.77.163]) by mx.google.com with ESMTPSA id d9sm88884010oen.3.2014.04.15.12.00.10 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 15 Apr 2014 12:00:10 -0700 (PDT) From: Rob Herring To: Peter Maydell , qemu-devel@nongnu.org Date: Tue, 15 Apr 2014 14:00:01 -0500 Message-Id: <1397588401-20366-1-git-send-email-robherring2@gmail.com> X-Mailer: git-send-email 1.9.1 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4003:c02::235 Cc: Rob Herring Subject: [Qemu-devel] [PATCH] target-arm: implement WFE/YIELD as a yield for AArch64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Original-Sender: robherring2@gmail.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c03::22f is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=fail header.i=@gmail.com; dmarc=fail (p=NONE dis=NONE) header.from=gmail.com Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Rob Herring Like was done for AArch32 for WFE, implement both WFE and YIELD as a yield operation. This speeds up multi-core system emulation. Signed-off-by: Rob Herring Reviewed-by: Peter Maydell --- target-arm/translate-a64.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 226a1dd..0181d4b 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -1151,6 +1151,8 @@ static void handle_hint(DisasContext *s, uint32_t insn, return; case 1: /* YIELD */ case 2: /* WFE */ + s->is_jmp = DISAS_WFE; + return; case 4: /* SEV */ case 5: /* SEVL */ /* we treat all as NOP at least for now */ @@ -10769,6 +10771,10 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, case DISAS_EXC: case DISAS_SWI: break; + case DISAS_WFE: + gen_a64_set_pc_im(dc->pc); + gen_helper_wfe(cpu_env); + break; case DISAS_WFI: /* This is a special case because we don't want to just halt the CPU * if trying to debug across a WFI.