From patchwork Thu Apr 17 10:33:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 28534 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ob0-f197.google.com (mail-ob0-f197.google.com [209.85.214.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id A168B206A6 for ; Thu, 17 Apr 2014 10:53:32 +0000 (UTC) Received: by mail-ob0-f197.google.com with SMTP id wp4sf1299050obc.8 for ; Thu, 17 Apr 2014 03:53:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:date :message-id:in-reply-to:references:subject:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list; bh=fVObzNnQpMnetwOkqdwE8PvRQNy4me0oubdGeFfqdw4=; b=KcGUEzywi26AJHspomWiig+bciq3BKrUDOu4h8GdoVf0y2YdFXgYfN+Hx1Ly2z431V vwAivg1hmHODeAFk9oNp1jgV6gS4tVhnpBipdyXlqX2ORCfTFmCFVys8SxC0DNe5s9H3 nFtEVMqzIZQ6oEjntt1ZoxfKzF7WXfeKHOAgPX3QSFMJzOOfO7BTJSS6b3s3yl+KSlt8 MK7CNmQb5gRLm9uMj9YPap7VEjedrShUmtrm7snjEUeB+mr82QUUa/ehMR51zbFguVXh Pk88cyrne7hBRZwwqqUF0CVwgOSoU3gc2BIkvW6bmXMygWA5xDrIgxXGrArXrjwv8orV EyHw== X-Gm-Message-State: ALoCoQkd16lpJDuPVl9HIvmM0GwjqD/eSmqeq7xApbWc7d5cQlRVrXF5TTTU5tllGPbVb4xDnjYA X-Received: by 10.182.16.199 with SMTP id i7mr6884912obd.42.1397732012203; Thu, 17 Apr 2014 03:53:32 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.95.66 with SMTP id h60ls981327qge.54.gmail; Thu, 17 Apr 2014 03:53:32 -0700 (PDT) X-Received: by 10.58.122.164 with SMTP id lt4mr11200017veb.2.1397732012098; Thu, 17 Apr 2014 03:53:32 -0700 (PDT) Received: from mail-vc0-f179.google.com (mail-vc0-f179.google.com [209.85.220.179]) by mx.google.com with ESMTPS id is3si4383009vec.153.2014.04.17.03.53.32 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 17 Apr 2014 03:53:32 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.179 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.179; Received: by mail-vc0-f179.google.com with SMTP id ij19so284937vcb.24 for ; Thu, 17 Apr 2014 03:53:32 -0700 (PDT) X-Received: by 10.220.4.132 with SMTP id 4mr8120262vcr.9.1397732012019; Thu, 17 Apr 2014 03:53:32 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp25107vcb; Thu, 17 Apr 2014 03:53:31 -0700 (PDT) X-Received: by 10.224.47.8 with SMTP id l8mr11638660qaf.24.1397732011613; Thu, 17 Apr 2014 03:53:31 -0700 (PDT) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id d8si10339933qao.230.2014.04.17.03.53.31 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 17 Apr 2014 03:53:31 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:59599 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wajwh-0003Fq-6w for patch@linaro.org; Thu, 17 Apr 2014 06:53:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50980) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WajeD-0007pp-VH for qemu-devel@nongnu.org; Thu, 17 Apr 2014 06:34:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WajeC-0002VC-IH for qemu-devel@nongnu.org; Thu, 17 Apr 2014 06:34:25 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:47842) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WajeC-0002OB-9g for qemu-devel@nongnu.org; Thu, 17 Apr 2014 06:34:24 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Wajdw-00020f-FZ for qemu-devel@nongnu.org; Thu, 17 Apr 2014 11:34:08 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 17 Apr 2014 11:33:40 +0100 Message-Id: <1397730846-7576-26-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1397730846-7576-1-git-send-email-peter.maydell@linaro.org> References: <1397730846-7576-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 25/51] target-arm: Implement ISR_EL1 register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.179 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Implement the ISR_EL1 register. This is actually present in ARMv7 as well but was previously unimplemented. It is a read-only register that indicates whether interrupts are currently pending. Signed-off-by: Peter Maydell Reviewed-by: Peter Crosthwaite --- target-arm/helper.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 32af1df..825c8c9 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -665,6 +665,21 @@ static void csselr_write(CPUARMState *env, const ARMCPRegInfo *ri, env->cp15.c0_cssel = value & 0xf; } +static uint64_t isr_read(CPUARMState *env, const ARMCPRegInfo *ri) +{ + CPUState *cs = ENV_GET_CPU(env); + uint64_t ret = 0; + + if (cs->interrupt_request & CPU_INTERRUPT_HARD) { + ret |= CPSR_I; + } + if (cs->interrupt_request & CPU_INTERRUPT_FIQ) { + ret |= CPSR_F; + } + /* External aborts are not possible in QEMU so A bit is always clear */ + return ret; +} + static const ARMCPRegInfo v7_cp_reginfo[] = { /* DBGDRAR, DBGDSAR: always RAZ since we don't implement memory mapped * debug components @@ -782,6 +797,9 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { .cp = 15, .opc1 = 0, .crn = 10, .crm = 2, .opc2 = 1, .access = PL1_RW, .fieldoffset = offsetofhigh32(CPUARMState, cp15.mair_el1), .resetfn = arm_cp_reset_ignore }, + { .name = "ISR_EL1", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 0, .crn = 12, .crm = 1, .opc2 = 0, + .type = ARM_CP_NO_MIGRATE, .access = PL1_R, .readfn = isr_read }, REGINFO_SENTINEL };