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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id fv3si5947968icc.79.2014.05.23.08.31.46 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 23 May 2014 08:31:47 -0700 (PDT) Received-SPF: none (google.com: pm215@archaic.org.uk does not designate permitted sender hosts) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WnrRe-00047I-F3; Fri, 23 May 2014 16:31:42 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, "Edgar E. Iglesias" , peter.crosthwaite@xilinx.com, alex.bennee@linaro.org, aggelerf@ethz.ch, rth@twiddle.net Subject: [PATCH 5/5] target-arm: Use a 1:1 mapping between EL and MMU index Date: Fri, 23 May 2014 16:31:42 +0100 Message-Id: <1400859102-15779-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1400859102-15779-1-git-send-email-peter.maydell@linaro.org> References: <1400859102-15779-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.180 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Message-id: 1400805738-11889-7-git-send-email-edgar.iglesias@gmail.com --- target-arm/cpu.h | 8 ++++---- target-arm/translate.h | 6 +----- 2 files changed, 5 insertions(+), 9 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 11b7a0b..62d85ff 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1080,12 +1080,12 @@ static inline CPUARMState *cpu_init(const char *cpu_model) #define cpu_list arm_cpu_list /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user -#define MMU_USER_IDX 1 +#define MMU_MODE0_SUFFIX _user +#define MMU_MODE1_SUFFIX _kernel +#define MMU_USER_IDX 0 static inline int cpu_mmu_index (CPUARMState *env) { - return arm_current_pl(env) ? 0 : 1; + return arm_current_pl(env); } #include "exec/cpu-all.h" diff --git a/target-arm/translate.h b/target-arm/translate.h index 8737af0..31a0104 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -54,11 +54,7 @@ static inline int arm_dc_feature(DisasContext *dc, int feature) static inline int get_mem_index(DisasContext *s) { -#ifdef CONFIG_USER_ONLY - return 1; -#else - return s->user; -#endif + return s->current_pl; } /* target-specific extra values for is_jmp */