From patchwork Fri Dec 5 14:11:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 41977 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-lb0-f199.google.com (mail-lb0-f199.google.com [209.85.217.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 59319260B4 for ; Fri, 5 Dec 2014 14:11:34 +0000 (UTC) Received: by mail-lb0-f199.google.com with SMTP id u10sf497683lbd.6 for ; Fri, 05 Dec 2014 06:11:33 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=ZvLB+ixv7zemxEoceqz0PzS77Nuj+k6iwanTlVk0ExI=; b=IiwDYG8d/5RMnSOs8D4hGRcIZlugbq69GetSJohMFgYtTaF/AEUTe2K2J4AaJxsIpN 64DBWiQsewCNwQmq8hfEQ/sD4BZKmEyaT0wzVfrCveK+lRww4bYJqmxfCWmsrFqeS52y wTohHzQ8Kt1mmVKQYqJizMLWRBndIjsWFAU8Y8JQVlFeNuwaXr+shO43X2w/q4acZpHL bJSvqfp1TLSl1CGbjZqaqFWIj8Buctkl9uvjBRdFfqEs48F0rXd0dHgCpR2Jr+8xPDrP tauFN6vVLLOcFOwVB5EMo+yIwFhUhSZRuxtVvtHpGtWF0W/a1wEsYuyhF5uWfO/itxGX mirw== X-Gm-Message-State: ALoCoQmFfjdgkA8ABD2hQzStBr2Sd9kDMjnvPDb65Lrr2Z6/udd60nqva3D8lWRX8SKKH3+dcDuh X-Received: by 10.194.134.193 with SMTP id pm1mr528638wjb.4.1417788693232; Fri, 05 Dec 2014 06:11:33 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.153.11.131 with SMTP id ei3ls316346lad.106.gmail; Fri, 05 Dec 2014 06:11:32 -0800 (PST) X-Received: by 10.152.36.232 with SMTP id t8mr3163541laj.6.1417788692916; Fri, 05 Dec 2014 06:11:32 -0800 (PST) Received: from mail-la0-f44.google.com (mail-la0-f44.google.com. [209.85.215.44]) by mx.google.com with ESMTPS id b1si9174118lab.72.2014.12.05.06.11.32 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 05 Dec 2014 06:11:32 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.44 as permitted sender) client-ip=209.85.215.44; Received: by mail-la0-f44.google.com with SMTP id gd6so219377lab.17 for ; Fri, 05 Dec 2014 06:11:32 -0800 (PST) X-Received: by 10.112.52.37 with SMTP id q5mr3098997lbo.32.1417788692837; Fri, 05 Dec 2014 06:11:32 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.112.184.201 with SMTP id ew9csp216670lbc; Fri, 5 Dec 2014 06:11:31 -0800 (PST) X-Received: by 10.68.211.193 with SMTP id ne1mr36025250pbc.49.1417788691005; Fri, 05 Dec 2014 06:11:31 -0800 (PST) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id q5si27884653pdl.41.2014.12.05.06.11.28 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 05 Dec 2014 06:11:30 -0800 (PST) Received-SPF: none (google.com: pm215@archaic.org.uk does not designate permitted sender hosts) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1XwtbP-00013j-Ri; Fri, 05 Dec 2014 14:11:23 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Christoffer Dall , =?UTF-8?q?Alex=20Benn=C3=A9e?= , pranavkumar@linaro.org Subject: [PATCH 2/2] target-arm: Support save/load for 64 bit CPUs Date: Fri, 5 Dec 2014 14:11:23 +0000 Message-Id: <1417788683-4038-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1417788683-4038-1-git-send-email-peter.maydell@linaro.org> References: <1417788683-4038-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.44 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , For migration to work on 64 bit CPUs, we need to include both the 64-bit integer register file and the PSTATE. Everything else is either stored in the same place as existing 32-bit CPU state or handled by the generic sysreg mechanism. Signed-off-by: Peter Maydell --- The pstate save/load is a little ugly and suggests that we could perhaps benefit from unifying the state storage/access for 64-bit pstate and 32-bit PSR; however Alex had a go at that a while back and it turns out to be trickier than it looks. This is a pragmatic fix which makes save/load work (and the on-the-wire state is right, at least). --- target-arm/machine.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/target-arm/machine.c b/target-arm/machine.c index 6437690..c29e7a2 100644 --- a/target-arm/machine.c +++ b/target-arm/machine.c @@ -127,6 +127,13 @@ static int get_cpsr(QEMUFile *f, void *opaque, size_t size) CPUARMState *env = &cpu->env; uint32_t val = qemu_get_be32(f); + env->aarch64 = ((val & PSTATE_nRW) == 0); + + if (is_a64(env)) { + pstate_write(env, val); + return 0; + } + /* Avoid mode switch when restoring CPSR */ env->uncached_cpsr = val & CPSR_M; cpsr_write(env, val, 0xffffffff); @@ -137,8 +144,15 @@ static void put_cpsr(QEMUFile *f, void *opaque, size_t size) { ARMCPU *cpu = opaque; CPUARMState *env = &cpu->env; + uint32_t val; + + if (is_a64(env)) { + val = pstate_read(env); + } else { + val = cpsr_read(env); + } - qemu_put_be32(f, cpsr_read(env)); + qemu_put_be32(f, val); } static const VMStateInfo vmstate_cpsr = { @@ -222,12 +236,14 @@ static int cpu_post_load(void *opaque, int version_id) const VMStateDescription vmstate_arm_cpu = { .name = "cpu", - .version_id = 21, - .minimum_version_id = 21, + .version_id = 22, + .minimum_version_id = 22, .pre_save = cpu_pre_save, .post_load = cpu_post_load, .fields = (VMStateField[]) { VMSTATE_UINT32_ARRAY(env.regs, ARMCPU, 16), + VMSTATE_UINT64_ARRAY(env.xregs, ARMCPU, 32), + VMSTATE_UINT64(env.pc, ARMCPU), { .name = "cpsr", .version_id = 0,