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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id y62si7721305qky.22.2015.04.03.03.07.51 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 03 Apr 2015 03:07:52 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:33276 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YdyVz-0003rL-1u for patch@linaro.org; Fri, 03 Apr 2015 06:07:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38246) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YdyUV-0001ir-L6 for qemu-devel@nongnu.org; Fri, 03 Apr 2015 06:06:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YdyUR-00063Q-1m for qemu-devel@nongnu.org; Fri, 03 Apr 2015 06:06:19 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:9581) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YdyUQ-0005yx-D9 for qemu-devel@nongnu.org; Fri, 03 Apr 2015 06:06:14 -0400 Received: from 172.24.2.119 (EHLO szxeml425-hub.china.huawei.com) ([172.24.2.119]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BDZ47806; Fri, 03 Apr 2015 18:06:01 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml425-hub.china.huawei.com (10.82.67.180) with Microsoft SMTP Server id 14.3.158.1; Fri, 3 Apr 2015 18:05:48 +0800 From: Shannon Zhao To: , , , , , , , , , , Date: Fri, 3 Apr 2015 18:03:44 +0800 Message-ID: <1428055432-12120-13-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1428055432-12120-1-git-send-email-zhaoshenglong@huawei.com> References: <1428055432-12120-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.551E6609.00F7, ss=1, re=0.001, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 0a4b044e7a2baf7bf615c16b3782cddd X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 119.145.14.66 Cc: hangaohuai@huawei.com, shannon.zhao@linaro.org, peter.huangpeng@huawei.com, zhaoshenglong@huawei.com Subject: [Qemu-devel] [PATCH v4 12/20] hw/arm/virt-acpi-build: Add PCIe info and generate MCFG table X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Shannon Zhao Add PCIe info struct, prepare for building PCIe table. And generate MCFG table. Signed-off-by: Shannon Zhao Signed-off-by: Shannon Zhao --- hw/arm/virt-acpi-build.c | 21 +++++++++++++++++++++ include/hw/arm/virt-acpi-build.h | 12 ++++++++++++ 2 files changed, 33 insertions(+) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index dd5538b..a979582 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -229,6 +229,24 @@ build_rsdt(GArray *table_data, GArray *linker, GArray *table_offsets) (void *)rsdt, "RSDT", rsdt_len, 1); } +static void +build_mcfg(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info) +{ + AcpiTableMcfg *mcfg; + acpi_pcie_info *info = guest_info->pcie_info; + int len = sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]); + + mcfg = acpi_data_push(table_data, len); + mcfg->allocation[0].address = cpu_to_le64(info->pcie_ecam_base); + + /* Only a single allocation so no need to play with segments */ + mcfg->allocation[0].pci_segment = cpu_to_le16(0); + mcfg->allocation[0].start_bus_number = 0; + mcfg->allocation[0].end_bus_number = info->nr_pcie_buses - 1; + + build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1); +} + /* GTDT */ static void build_gtdt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info) @@ -401,6 +419,9 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables) acpi_add_table(table_offsets, tables_blob); build_gtdt(tables_blob, tables->linker, guest_info); + acpi_add_table(table_offsets, tables_blob); + build_mcfg(tables_blob, tables->linker, guest_info); + /* RSDT is pointed to by RSDP */ rsdt = tables_blob->len; build_rsdt(tables_blob, tables->linker, table_offsets); diff --git a/include/hw/arm/virt-acpi-build.h b/include/hw/arm/virt-acpi-build.h index 2780856..d534489 100644 --- a/include/hw/arm/virt-acpi-build.h +++ b/include/hw/arm/virt-acpi-build.h @@ -47,6 +47,17 @@ typedef struct acpi_dsdt_info { const hwaddr *flash_addr; } acpi_dsdt_info; +typedef struct acpi_pcie_info { + const int *pcie_irq; + hwaddr pcie_mmio_base; + hwaddr pcie_mmio_size; + hwaddr pcie_ioport_base; + hwaddr pcie_ioport_size; + hwaddr pcie_ecam_base; + hwaddr pcie_ecam_size; + int nr_pcie_buses; +} acpi_pcie_info; + typedef struct VirtGuestInfo { int smp_cpus; int max_cpus; @@ -54,6 +65,7 @@ typedef struct VirtGuestInfo { acpi_madt_info *madt_info; acpi_dsdt_info *dsdt_info; acpi_gtdt_info *gtdt_info; + acpi_pcie_info *pcie_info; } VirtGuestInfo;