From patchwork Wed Feb 22 17:13:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 94333 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1013284qgi; Wed, 22 Feb 2017 09:15:48 -0800 (PST) X-Received: by 10.55.144.6 with SMTP id s6mr34932432qkd.140.1487783748619; Wed, 22 Feb 2017 09:15:48 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id w63si1342762qkc.198.2017.02.22.09.15.48 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 22 Feb 2017 09:15:48 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54195 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgaW1-0007pp-UI for patch@linaro.org; Wed, 22 Feb 2017 12:15:45 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35532) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgaTm-0006dw-Co for qemu-devel@nongnu.org; Wed, 22 Feb 2017 12:13:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgaTl-0000Up-7l for qemu-devel@nongnu.org; Wed, 22 Feb 2017 12:13:26 -0500 Received: from mail-wm0-x230.google.com ([2a00:1450:400c:c09::230]:37057) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cgaTk-0000UR-Vy for qemu-devel@nongnu.org; Wed, 22 Feb 2017 12:13:25 -0500 Received: by mail-wm0-x230.google.com with SMTP id v77so6901522wmv.0 for ; Wed, 22 Feb 2017 09:13:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5ZSiigSb9cm4SliVXsPrJvsBJvx/GvFAAcflaedYGjg=; b=j12lFxcN2JoUOPGuQhEwKZSfeTtLuOiV5jDEL9qSIuug7NJWcDhfZZM1FyGX/pL3DX 8NyhWEtOkwRJVHC2wEd6Dcvy8u3FmN92Qt9ClKhm8WGd1/uf1KHCzPKCwzLRMGwE4M2k qcy0SD6NZwyogEeNUGhal+yFALH4KEXAOqdBg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5ZSiigSb9cm4SliVXsPrJvsBJvx/GvFAAcflaedYGjg=; b=ERFOWyqokktX2aCWgk19D5etx7CkK0LuIFkaxt9tkF8S7HOSkyMsRKqrlngqCcmAUq QeSP1VplOE/LAIK/4MWiq0+cUI5j2Jt5HRWokPGrLJHA7P9i5gb6Htmu4YHHL17SNjDG jFtm0spytwmWl/dkl9HH8jUW77KTwlPMdUbdtSVuGY75Gz5EupnfnZmz4us90ijrt5PS RoMega4UIOixdWrVraZIYdGXNwmjcobFjvz446X44zM1v7MoUUa73XU3WLsYiQqxvGFQ KsDj3zUA7MgNMi+04vhTWYZMF7c9s6qs72lxemyzw4ceTHuUjYNq/abgLokdk5KtYsSL WyHg== X-Gm-Message-State: AMke39k+9gnM4tjT16vVoLYkn2+cXLiVAoj0lMrKQiog9Zauu4xpblswxFKAjnpGJJ+DSPlv X-Received: by 10.28.211.205 with SMTP id k196mr3223751wmg.124.1487783603810; Wed, 22 Feb 2017 09:13:23 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id o50sm2482018wrc.56.2017.02.22.09.13.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Feb 2017 09:13:19 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 0EBDC3E03BB; Wed, 22 Feb 2017 17:13:28 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: rth@twiddle.net, peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:13:07 +0000 Message-Id: <20170222171327.26624-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170222171327.26624-1-alex.bennee@linaro.org> References: <20170222171327.26624-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::230 Subject: [Qemu-devel] [PATCH v13 04/24] tcg: move TCG_MO/BAR types into own file X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, jan.kiszka@siemens.com, mark.burton@greensocs.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, serge.fdrv@gmail.com, pbonzini@redhat.com, bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , bamvor.zhangjian@linaro.org, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We'll be using the memory ordering definitions to define values for both the host and guest. To avoid fighting with circular header dependencies just move these types into their own minimal header. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- v8 - add clarifying comment about the form TCG_MO_A_B --- tcg/tcg-mo.h | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ tcg/tcg.h | 18 +----------------- 2 files changed, 49 insertions(+), 17 deletions(-) create mode 100644 tcg/tcg-mo.h -- 2.11.0 diff --git a/tcg/tcg-mo.h b/tcg/tcg-mo.h new file mode 100644 index 0000000000..c2c55704e1 --- /dev/null +++ b/tcg/tcg-mo.h @@ -0,0 +1,48 @@ +/* + * Tiny Code Generator for QEMU + * + * Copyright (c) 2008 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef TCG_MO_H +#define TCG_MO_H + +typedef enum { + /* Used to indicate the type of accesses on which ordering + is to be ensured. Modeled after SPARC barriers. + + This is of the form TCG_MO_A_B where A is before B in program order. + */ + TCG_MO_LD_LD = 0x01, + TCG_MO_ST_LD = 0x02, + TCG_MO_LD_ST = 0x04, + TCG_MO_ST_ST = 0x08, + TCG_MO_ALL = 0x0F, /* OR of the above */ + + /* Used to indicate the kind of ordering which is to be ensured by the + instruction. These types are derived from x86/aarch64 instructions. + It should be noted that these are different from C11 semantics. */ + TCG_BAR_LDAQ = 0x10, /* Following ops will not come forward */ + TCG_BAR_STRL = 0x20, /* Previous ops will not be delayed */ + TCG_BAR_SC = 0x30, /* No ops cross barrier; OR of the above */ +} TCGBar; + +#endif /* TCG_MO_H */ diff --git a/tcg/tcg.h b/tcg/tcg.h index 631c6f69b1..f946452049 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -29,6 +29,7 @@ #include "cpu.h" #include "exec/tb-context.h" #include "qemu/bitops.h" +#include "tcg-mo.h" #include "tcg-target.h" /* XXX: make safe guess about sizes */ @@ -498,23 +499,6 @@ static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t) #define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1) #define TCG_CALL_DUMMY_ARG ((TCGArg)(-1)) -typedef enum { - /* Used to indicate the type of accesses on which ordering - is to be ensured. Modeled after SPARC barriers. */ - TCG_MO_LD_LD = 0x01, - TCG_MO_ST_LD = 0x02, - TCG_MO_LD_ST = 0x04, - TCG_MO_ST_ST = 0x08, - TCG_MO_ALL = 0x0F, /* OR of the above */ - - /* Used to indicate the kind of ordering which is to be ensured by the - instruction. These types are derived from x86/aarch64 instructions. - It should be noted that these are different from C11 semantics. */ - TCG_BAR_LDAQ = 0x10, /* Following ops will not come forward */ - TCG_BAR_STRL = 0x20, /* Previous ops will not be delayed */ - TCG_BAR_SC = 0x30, /* No ops cross barrier; OR of the above */ -} TCGBar; - /* Conditions. Note that these are laid out for easy manipulation by the functions below: bit 0 is used for inverting;