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X-Received-From: 2a00:1450:400c:c0c::236 Subject: [Qemu-devel] [RFC PATCH 8/9] target/arm/helpers: introduce ADVSIMD flags X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is used to pass constant information to the helper. This includes immediate data and element counts/offsets. Signed-off-by: Alex Bennée --- target/arm/advsimd_helper_flags.h | 50 +++++++++++++++++++++++++++++++++++++++ target/arm/helper-a64.c | 1 + target/arm/translate-a64.c | 2 ++ 3 files changed, 53 insertions(+) create mode 100644 target/arm/advsimd_helper_flags.h -- 2.13.0 diff --git a/target/arm/advsimd_helper_flags.h b/target/arm/advsimd_helper_flags.h new file mode 100644 index 0000000000..47429e6fd1 --- /dev/null +++ b/target/arm/advsimd_helper_flags.h @@ -0,0 +1,50 @@ +/* + * AArch64 Vector Flags + * + * Copyright (c) 2017 Linaro + * Author: Alex Bennée + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +/* AdvSIMD element data + * + * We pack all the additional information for elements into a single + * 32 bit constant passed by register. Hopefully for groups of + * identical operations on different registers this should propergate + * nicely in the TCG. + * + * The following control element iteration: + * ADVSIMD_OPR_ELT - the count of elements affected + * ADVSIMD_ALL_ELT - the total count of elements (e.g. clear all-opr elements) + * ADVSIMD_DOFF_ELT - the offset for the destination register (e.g. foo2 ops) + * + * We encode immediate data in: + * ADVSIMD_DATA + * + * Typically this is things like shift counts and the like. + */ + +#define ADVSIMD_OPR_ELT_BITS 5 +#define ADVSIMD_OPR_ELT_SHIFT 0 +#define ADVSIMD_ALL_ELT_BITS 5 +#define ADVSIMD_ALL_ELT_SHIFT 5 +#define ADVSIMD_DOFF_ELT_BITS 5 +#define ADVSIMD_DOFF_ELT_SHIFT 10 +#define ADVSIMD_DATA_BITS 16 +#define ADVSIMD_DATA_SHIFT 16 + +#define GET_SIMD_DATA(t, d) extract32(d, \ + ADVSIMD_ ## t ## _SHIFT, \ + ADVSIMD_ ## t ## _BITS) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index d9df82cff5..17b1edfb5f 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -30,6 +30,7 @@ #include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "qemu/int128.h" +#include "advsimd_helper_flags.h" #include "tcg.h" #include /* For crc32 */ diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index b5f48605a7..f474c5008b 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -34,6 +34,8 @@ #include "exec/helper-gen.h" #include "exec/log.h" +#include "advsimd_helper_flags.h" + #include "trace-tcg.h" /* Global registers */