From patchwork Thu Oct 26 15:27:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 117245 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp899237qgn; Thu, 26 Oct 2017 08:27:39 -0700 (PDT) X-Google-Smtp-Source: ABhQp+SGnlFZ4yLCzrcjs5pqKYJT6Z51nGACu6Q4JECnP3J1iyVL+jUfhr8KWEwgiX7qiyDxkkIO X-Received: by 10.13.226.196 with SMTP id l187mr16217008ywe.103.1509031659529; Thu, 26 Oct 2017 08:27:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509031659; cv=none; d=google.com; s=arc-20160816; b=YifUvsTkmGQNSiP+lsQdl3S12mazqPXH+gkUbR2gT4oEGQrZh2DLE5PfELoZjzHj7/ uODKLiHqUwZPoA80sHu4oHvEBy1Cd/ydPEa5FyAarp2dVzuks6iTO/7KwxmdSgGzWjXj PhZ7rS/yKNZO+JrQC4ol8oYSvbkQJtMQ8lne6k08T30FvI+DH/iQz0QsLpxCD1epm3lA YktpBlaHfkJD15AlZCVvFF5sLNeY+2DoS6NcdaIKA5Scs0qSCOzMAX3JE+RNOrG/riBw 4f1Gn4Fe6FRUc70HfMlrEtkmYjrCec/Qg+pymb2FOCP8Soy2in6lF5pjQ5GDCi02N3D/ 3v1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=+7JADXPJs6prCRjgBK7Jr1opRp0AXyT+/c4kFIOnQi8=; b=ODTE3YyKyVSN9FnpWTkFRt77fWQjVDRAvGYuGEKlbJFbH0caSMFDSKYr65GcGDolOe ydYOze3o1v1g2sK1EawmcIOAiHvenMefIywqV3UYQMnP7QooQbSoRH8WoSt5veXvgtp4 fazlTZ2tIW5KgC0Jypbn8gNDr6u0eOe6ERejasXSjQgYzYw3Mqcu2g1rOPf9ZLa9NpXL nN1Bsw4uhMRdbZdemVzHRqZ7vXS2L5XbRQK47j6xgchmwdrQ5rrocVp1KZLGwe9P17UP LKTt5CtjCNtf/KKxvQc1qsYl4tM3WmOpFbjCl1VcG5p4IZ3MNVxZhGMaBQe+Dxbh1sld H8yw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=G+zEgx3h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id o6si890697ywi.84.2017.10.26.08.27.39 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 26 Oct 2017 08:27:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=G+zEgx3h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:53485 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7k4J-0006k4-2M for patch@linaro.org; Thu, 26 Oct 2017 11:27:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39789) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7k3w-0006iK-QH for qemu-devel@nongnu.org; Thu, 26 Oct 2017 11:27:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e7k3t-0005h6-EP for qemu-devel@nongnu.org; Thu, 26 Oct 2017 11:27:15 -0400 Received: from mail-wm0-x242.google.com ([2a00:1450:400c:c09::242]:54239) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e7k3t-0005g6-8Q for qemu-devel@nongnu.org; Thu, 26 Oct 2017 11:27:13 -0400 Received: by mail-wm0-x242.google.com with SMTP id r196so9130634wmf.2 for ; Thu, 26 Oct 2017 08:27:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+7JADXPJs6prCRjgBK7Jr1opRp0AXyT+/c4kFIOnQi8=; b=G+zEgx3h61ElgN5vH3hyX3TSIaoYQWzzl/zVd5U/MM8D5fWHLIrFGHYgf8Oxd5XSA6 qcXs/YNTMaFkl7uHb1FWAOKZM0Tn3pSnXd/XT7jl3/jeHehLQ00V+a7N6vus5d1VsHC1 4yeiv1dg7SqBjckkKDgQpfT9dzKPPuQldxZlM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+7JADXPJs6prCRjgBK7Jr1opRp0AXyT+/c4kFIOnQi8=; b=rsspC8AGkbhUlI4fVhJo3M5x7SVbNbRcIvwLhbvoy/C0oh2THp8/NtF2zxt4jdm5bs BYf6sEXG3aIbePgd2eqCWg0Q7tYKh82lP62zXBUyHTBRbCtDvkCBtmB8ulVEsnlvKjvP 1B0OpST+qbWTc/DS95VHbvumaB2gn8Cd9NCAfQu43qngbu07mACGXWlnoVamOdDU9tz+ zFIXB8R9knsaw24yreA76vhFquHGSDUCjkBbuM2gG0LaoAbP+50/XztorBqzJayXNss4 NskIp3Gi37Umew1NX79VHCj0hU/xmIwUUduvYNlo/utEKYxHviqCSdQ+RwIvnCIFVpsk DRPA== X-Gm-Message-State: AMCzsaVvgEoFvmaTkzf7W3hMid3v+SdMghDmTfnQoG64ClpnXbv1g2Hr eZaG4Du29N0eGO3jEgm3aJmyQ1+Kfew= X-Received: by 10.28.137.139 with SMTP id l133mr1729658wmd.123.1509031631961; Thu, 26 Oct 2017 08:27:11 -0700 (PDT) Received: from cloudburst.twiddle.net ([62.168.35.108]) by smtp.gmail.com with ESMTPSA id k13sm9921825wrd.95.2017.10.26.08.27.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Oct 2017 08:27:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 26 Oct 2017 17:27:04 +0200 Message-Id: <20171026152704.24525-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171026152704.24525-1-richard.henderson@linaro.org> References: <20171026152704.24525-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::242 Subject: [Qemu-devel] [PATCH 2/2] tcg/s390x: Use constant pool for prologue X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent.desnogues@gmail.com, qemu-s390x@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Rather than have separate code only used for guest_base, rely on a recent change to handle constant pool entries. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 44 ++++++++++++-------------------------------- 1 file changed, 12 insertions(+), 32 deletions(-) -- 2.13.6 diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 38a7cdab75..9af6dcef05 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -555,9 +555,6 @@ static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg dst, TCGReg src) static const S390Opcode lli_insns[4] = { RI_LLILL, RI_LLILH, RI_LLIHL, RI_LLIHH }; -static const S390Opcode ii_insns[4] = { - RI_IILL, RI_IILH, RI_IIHL, RI_IIHH -}; static bool maybe_out_small_movi(TCGContext *s, TCGType type, TCGReg ret, tcg_target_long sval) @@ -647,36 +644,19 @@ static void tcg_out_movi_int(TCGContext *s, TCGType type, TCGReg ret, return; } - /* When allowed, stuff it in the constant pool. */ - if (!in_prologue) { - if (USE_REG_TB) { - tcg_out_insn(s, RXY, LG, ret, TCG_REG_TB, TCG_REG_NONE, 0); - new_pool_label(s, sval, R_390_20, s->code_ptr - 2, - -(intptr_t)s->code_gen_ptr); - } else { - tcg_out_insn(s, RIL, LGRL, ret, 0); - new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2); - } - return; - } - - /* What's left is for the prologue, loading GUEST_BASE, and because - it failed to match above, is known to be a full 64-bit quantity. - We could try more than this, but it probably wouldn't pay off. */ - if (s390_facilities & FACILITY_EXT_IMM) { - tcg_out_insn(s, RIL, LLILF, ret, uval); - tcg_out_insn(s, RIL, IIHF, ret, uval >> 32); + /* Otherwise, stuff it in the constant pool. */ + if (s390_facilities & FACILITY_GEN_INST_EXT) { + tcg_out_insn(s, RIL, LGRL, ret, 0); + new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2); + } else if (USE_REG_TB && !in_prologue) { + tcg_out_insn(s, RXY, LG, ret, TCG_REG_TB, TCG_REG_NONE, 0); + new_pool_label(s, sval, R_390_20, s->code_ptr - 2, + -(intptr_t)s->code_gen_ptr); } else { - const S390Opcode *insns = lli_insns; - int i; - - for (i = 0; i < 4; i++) { - uint16_t part = uval >> (16 * i); - if (part) { - tcg_out_insn_RI(s, insns[i], ret, part); - insns = ii_insns; - } - } + TCGReg base = ret ? ret : TCG_TMP0; + tcg_out_insn(s, RIL, LARL, base, 0); + new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2); + tcg_out_insn(s, RXY, LG, ret, base, TCG_REG_NONE, 0); } }