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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id c59-v6si371885qva.149.2018.07.02.23.04.44 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 02 Jul 2018 23:04:44 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=dsl25rdQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:37956 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faEQd-0006oO-Ps for patch@linaro.org; Tue, 03 Jul 2018 02:04:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39739) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faEKU-0002qE-8l for qemu-devel@nongnu.org; Tue, 03 Jul 2018 01:58:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1faEKS-0006xc-CS for qemu-devel@nongnu.org; Tue, 03 Jul 2018 01:58:22 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:44505) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1faEKR-0006tp-NB; Tue, 03 Jul 2018 01:58:20 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 41KYM85BWyz9s78; Tue, 3 Jul 2018 15:58:12 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1530597492; bh=/tGRmhjXbAUf/n5ke5eecw2i4jfxDvsr5FNtGq//Rqk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dsl25rdQOG4G8tXG1eJzqvKhlG/NQpstUuxqtR3qeBXsxDJrh5CLa/AZc9iadhkk1 Hux5BW6J04Sp9EWF9zX6TCx761QxOXz239OsprLiLHJSfRMFUfiGGY4H9mmvrsnqrM vjlMdb+KioqjVy/jgunaumCasajL7cZwKgL4gFqw= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 3 Jul 2018 15:57:49 +1000 Message-Id: <20180703055804.13449-21-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180703055804.13449-1-david@gibson.dropbear.id.au> References: <20180703055804.13449-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 20/35] target/ppc: Use MO_ALIGN for EXIWX and ECOWX X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, Richard Henderson , mdroth@linux.vnet.ibm.com, agraf@suse.de, aik@ozlabs.ru, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson This avoids the need for gen_check_align entirely. Signed-off-by: Richard Henderson Signed-off-by: David Gibson --- target/ppc/translate.c | 25 ++++--------------------- 1 file changed, 4 insertions(+), 21 deletions(-) -- 2.17.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 53ca8f0114..c2a28be6d7 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -2388,23 +2388,6 @@ static inline void gen_addr_add(DisasContext *ctx, TCGv ret, TCGv arg1, } } -static inline void gen_check_align(DisasContext *ctx, TCGv EA, int mask) -{ - TCGLabel *l1 = gen_new_label(); - TCGv t0 = tcg_temp_new(); - TCGv_i32 t1, t2; - tcg_gen_andi_tl(t0, EA, mask); - tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1); - t1 = tcg_const_i32(POWERPC_EXCP_ALIGN); - t2 = tcg_const_i32(ctx->opcode & 0x03FF0000); - gen_update_nip(ctx, ctx->base.pc_next - 4); - gen_helper_raise_exception_err(cpu_env, t1, t2); - tcg_temp_free_i32(t1); - tcg_temp_free_i32(t2); - gen_set_label(l1); - tcg_temp_free(t0); -} - static inline void gen_align_no_le(DisasContext *ctx) { gen_exception_err(ctx, POWERPC_EXCP_ALIGN, @@ -4706,8 +4689,8 @@ static void gen_eciwx(DisasContext *ctx) gen_set_access_type(ctx, ACCESS_EXT); t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); - gen_check_align(ctx, t0, 0x03); - gen_qemu_ld32u(ctx, cpu_gpr[rD(ctx->opcode)], t0); + tcg_gen_qemu_ld_tl(cpu_gpr[rD(ctx->opcode)], t0, ctx->mem_idx, + DEF_MEMOP(MO_UL | MO_ALIGN)); tcg_temp_free(t0); } @@ -4719,8 +4702,8 @@ static void gen_ecowx(DisasContext *ctx) gen_set_access_type(ctx, ACCESS_EXT); t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); - gen_check_align(ctx, t0, 0x03); - gen_qemu_st32(ctx, cpu_gpr[rD(ctx->opcode)], t0); + tcg_gen_qemu_st_tl(cpu_gpr[rD(ctx->opcode)], t0, ctx->mem_idx, + DEF_MEMOP(MO_UL | MO_ALIGN)); tcg_temp_free(t0); }