From patchwork Tue Aug 21 04:33:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 144679 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp4794681ljj; Mon, 20 Aug 2018 21:50:42 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaCrLnvlFxK1ot6TuxYg52Z4TKMuosWKKcCE43Kaz2BtL+Iaca2J3JLouJofZybvR1ry125 X-Received: by 2002:a37:90d:: with SMTP id 13-v6mr4199925qkj.437.1534827042649; Mon, 20 Aug 2018 21:50:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534827042; cv=none; d=google.com; s=arc-20160816; b=YZEJGcbX4w+uT/ZE/Lkw3UqlaHqHgLIJRLMCxZp8fRZcdO8Os4Jwbt0dpIiHDEYaWo VDbKbMH2js0dbKmNj+HGjOBoun5aYs3iWE/bXfFNFvo2euqdIW+m9qboB1FWYXXS7ViY mG3V6VSkfXVkogeSglchM3SQt+f5V24VgnC/HzsCaLOZp/KfGgo7ODMWPv/f69z2eixc e7ggvFEi0lzChGXMmqmzQMXxTcmACDnf5iE2TPtnQI628K8jXI3MXAegFJpdeQaVooDu mN8nnRuMtREoI71rcTVfnGSn4MmT+yr+XYjdeyLIP72i4RyOtajK1vNJmnX5x9owQt5d WC3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=onj6C5yPMaWSN41XIhvlPWrw6XwX3TbQnnbWG+epZ78=; b=zDtAqRm3lQvrgqugk3HdmYVvi/DtvGYqupNEvjC6DRv2KL9kgcWToQbmZrJZJZLU2C xqNcqjwD6xDHyAqMNWCFnPJU/YOescGnkEjTgR0PcOOImXO8+bAj/HfMdipiOvz83CSr dBDX9JVIPOPM2ThjF6whnAQY5xaU3XhquHKJXPPS9dwkvQMEob5mNYMTZ0o3E5ai4E5j d9JjxWTvRi8TaULfhZw675uejmlebMd1zeexLdax3K7HgNwh01RK8cLwp26ftR63vatt 7XMxvzv+q3a1Xw1zfOVdmUB9v93rKSNCPElfUxM502CTTUJ9j6W+Bt/nESHiK6f/5gV2 SMsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@gibson.dropbear.id.au header.s=201602 header.b=JQST4MEm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id n126-v6si1448982qkn.229.2018.08.20.21.50.42 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 20 Aug 2018 21:50:42 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@gibson.dropbear.id.au header.s=201602 header.b=JQST4MEm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:50738 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1frycs-0004aU-4O for patch@linaro.org; Tue, 21 Aug 2018 00:50:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56666) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fryMx-0004GV-J5 for qemu-devel@nongnu.org; Tue, 21 Aug 2018 00:34:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fryMu-0000SX-Hn for qemu-devel@nongnu.org; Tue, 21 Aug 2018 00:34:15 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:54287) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fryMt-0000NT-NG; Tue, 21 Aug 2018 00:34:12 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 41vd9G2QwDz9sD2; Tue, 21 Aug 2018 14:33:52 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1534826034; bh=u9+8wiIsB3zZnSI+qXgfH/HDGlBY8LVD7m9bJU2ac00=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JQST4MEmLVsGSExFQ+rlP9PjGmO6tZENQiEJrYdN65FuC/hwqqENwi6sFZ0tuaCxa UrmmbAhnfcyb/dLbTJDxw3SRnykPnWQ+0HQjPprkiaoETN7s+j+yHLNrrBoA5oJzod /hpm54pjckIwl+mEIZsn2FSsNICHyAVw9yLIOyDc= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 21 Aug 2018 14:33:34 +1000 Message-Id: <20180821043343.7514-18-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180821043343.7514-1-david@gibson.dropbear.id.au> References: <20180821043343.7514-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 17/26] hw/ppc/ppc_boards: Don't use old_mmio for ref405ep_fpga X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, aik@ozlabs.ru, groug@kaod.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Switch the ref405ep_fpga device away from using the old_mmio MemoryRegion accessors. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/ppc/ppc405_boards.c | 60 +++++++----------------------------------- 1 file changed, 10 insertions(+), 50 deletions(-) -- 2.17.1 diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 70111075b3..f5a9c24b6c 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -66,7 +66,7 @@ struct ref405ep_fpga_t { uint8_t reg1; }; -static uint32_t ref405ep_fpga_readb (void *opaque, hwaddr addr) +static uint64_t ref405ep_fpga_readb(void *opaque, hwaddr addr, unsigned size) { ref405ep_fpga_t *fpga; uint32_t ret; @@ -87,8 +87,8 @@ static uint32_t ref405ep_fpga_readb (void *opaque, hwaddr addr) return ret; } -static void ref405ep_fpga_writeb (void *opaque, - hwaddr addr, uint32_t value) +static void ref405ep_fpga_writeb(void *opaque, hwaddr addr, uint64_t value, + unsigned size) { ref405ep_fpga_t *fpga; @@ -105,54 +105,14 @@ static void ref405ep_fpga_writeb (void *opaque, } } -static uint32_t ref405ep_fpga_readw (void *opaque, hwaddr addr) -{ - uint32_t ret; - - ret = ref405ep_fpga_readb(opaque, addr) << 8; - ret |= ref405ep_fpga_readb(opaque, addr + 1); - - return ret; -} - -static void ref405ep_fpga_writew (void *opaque, - hwaddr addr, uint32_t value) -{ - ref405ep_fpga_writeb(opaque, addr, (value >> 8) & 0xFF); - ref405ep_fpga_writeb(opaque, addr + 1, value & 0xFF); -} - -static uint32_t ref405ep_fpga_readl (void *opaque, hwaddr addr) -{ - uint32_t ret; - - ret = ref405ep_fpga_readb(opaque, addr) << 24; - ret |= ref405ep_fpga_readb(opaque, addr + 1) << 16; - ret |= ref405ep_fpga_readb(opaque, addr + 2) << 8; - ret |= ref405ep_fpga_readb(opaque, addr + 3); - - return ret; -} - -static void ref405ep_fpga_writel (void *opaque, - hwaddr addr, uint32_t value) -{ - ref405ep_fpga_writeb(opaque, addr, (value >> 24) & 0xFF); - ref405ep_fpga_writeb(opaque, addr + 1, (value >> 16) & 0xFF); - ref405ep_fpga_writeb(opaque, addr + 2, (value >> 8) & 0xFF); - ref405ep_fpga_writeb(opaque, addr + 3, value & 0xFF); -} - static const MemoryRegionOps ref405ep_fpga_ops = { - .old_mmio = { - .read = { - ref405ep_fpga_readb, ref405ep_fpga_readw, ref405ep_fpga_readl, - }, - .write = { - ref405ep_fpga_writeb, ref405ep_fpga_writew, ref405ep_fpga_writel, - }, - }, - .endianness = DEVICE_NATIVE_ENDIAN, + .read = ref405ep_fpga_readb, + .write = ref405ep_fpga_writeb, + .impl.min_access_size = 1, + .impl.max_access_size = 1, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .endianness = DEVICE_BIG_ENDIAN, }; static void ref405ep_fpga_reset (void *opaque)