From patchwork Wed Nov 28 05:38:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 152187 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp688737ljp; Tue, 27 Nov 2018 21:42:53 -0800 (PST) X-Google-Smtp-Source: AFSGD/Vr11WOQEjpTitfOjsfB1WYh8XxLrykHEuuE/kPk3B/SNyYpPwwKeqmfiwzSYWOVbuY+o/b X-Received: by 2002:a25:5186:: with SMTP id f128-v6mr36274660ybb.203.1543383773203; Tue, 27 Nov 2018 21:42:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543383773; cv=none; d=google.com; s=arc-20160816; b=xKZeeZuuCZysc8o3YGcYV/q0WU+/9ifqupAz3v3Nd07T4AdpSZQsPc2j9nZs/EfWV2 p28D6yA5h7di+p0PXRa7TwhQ9i6FZHh30ylNQAZ2AQ/w99+GNdhkNLmu9I9/E2AMlI/S oHIlcp1L+2ceVGc51cPiotY65OX6JSsJWe6Um9I9jLti8wObrlr7c2d4RWm3JlWDPXs6 1CjEj6v5aDlwjLPywcknoAc2cZYeQqrErtL8NnCtN6YCw5P8e46IqFDNhrC4XqIQZb7g d1ujyzH5yapqaX6sg6E6AzE52gN2RjtinYb13ZV4UvSFjCR41NYhBVcWTjuP/wWkQMVh Zd7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=wj+Ww7Y6K29VKQ07od9GNMsx9UfCK0GFYGutLalgTzo=; b=gRoMVfsNJ1S4FgWM3zFzLpgfp3//L8f0utWHxzvPQ/+A+kBtqp9NjbAwK/q3ykPqFj tNqAVtHNNSz1thAHtAc4IwkXTUKbR7GUBBGI7GfuXKRDkvg36LTN6JEjxo5g866Qh5AT bCEG2TvWvvbVwFPryY08vwEwX3/2KJJ4pJ4cwSqrtboPZfSy//j31B9H13e55d59BbNJ lJTy9z+oEEa7ZGwWgf2J7FUZPw0B2+LTTF1/WhlR6++xehtxrqHNlI6HBBFCwubGciKH kswT4BXl9fCMMUw/tGGWFfr5dwiRZekUeQbvOwueSymLCMzTr0FiYk7ZWsKIKgsKh6ED 9siw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RaMbZ1e6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id y8si4166327ywc.47.2018.11.27.21.42.53 for (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 27 Nov 2018 21:42:53 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RaMbZ1e6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46048 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gRscb-0006zc-Gn for patch@linaro.org; Wed, 28 Nov 2018 00:42:49 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47820) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gRsYd-0003ki-92 for qemu-devel@nongnu.org; Wed, 28 Nov 2018 00:38:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gRsYa-0004Iu-Fm for qemu-devel@nongnu.org; Wed, 28 Nov 2018 00:38:42 -0500 Received: from mail-pg1-x544.google.com ([2607:f8b0:4864:20::544]:33797) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gRsYa-0004Id-Ad for qemu-devel@nongnu.org; Wed, 28 Nov 2018 00:38:40 -0500 Received: by mail-pg1-x544.google.com with SMTP id 17so8979569pgg.1 for ; Tue, 27 Nov 2018 21:38:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wj+Ww7Y6K29VKQ07od9GNMsx9UfCK0GFYGutLalgTzo=; b=RaMbZ1e66VONctlDxmEsYf08mkvu1VLY3r/kmuGG+nnyFDclilr5n/nhDpG4Utpaej v7QM8qOBMKW0pCMh6X6LCqnEJG7e0imxDiKjjnNsj3DjiD56Vkh3UrRuZ7P3CbgnSPjk UuVLxy26cSKZBTg9R85ViryMbl8PIyXDRtHoE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wj+Ww7Y6K29VKQ07od9GNMsx9UfCK0GFYGutLalgTzo=; b=VL+cyELZ/g15ClxB/JwTzIQDKIA08vAtyFEzMF6A00tPFSly7qIRv4Tx7oSXvGyaq8 v0nrcK+pNegoLai25Kgrjhe3PT28QfHAbGqrZXdNQ+8nV7ScI8eGQhbwPhtjGZL6Yx2I u3rXmAoFaAqRwSgfDV5lr1Kyit3X/QQ8C5gY7D7HgJF2d1F0wEBCjA/YFKHY3Dj3UCuq o18B28OtW/rMEDe7tcEnZf06IUpGhHJSdYrOrJGl4L9twCr47Q2hRrzl4jRLP9H+nqrk lHPHJg5+4DF3NyMRJw/FkX0wPUwzosTl2Ij0a1ENZ8aGAhtUdFXx9uOGxUd6A1VtIeiY 8dsw== X-Gm-Message-State: AA+aEWYt6SF2EatlCo1mbuYRfLxuQxNZ0AVIybdEKZCPHshnRf6+cExy 14IVYYmLsZl5pVtKQVs55K2UvRHpTyo= X-Received: by 2002:a63:1904:: with SMTP id z4mr31067927pgl.135.1543383518976; Tue, 27 Nov 2018 21:38:38 -0800 (PST) Received: from cloudburst.twiddle.net (97-113-170-180.tukw.qwest.net. [97.113.170.180]) by smtp.gmail.com with ESMTPSA id 19sm8569336pfs.108.2018.11.27.21.38.37 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 27 Nov 2018 21:38:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 27 Nov 2018 21:38:24 -0800 Message-Id: <20181128053834.10861-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181128053834.10861-1-richard.henderson@linaro.org> References: <20181128053834.10861-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 Subject: [Qemu-devel] [PATCH 02/12] tcg: Add preferred_reg argument to temp_load X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cota@braap.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Pass this through to tcg_reg_alloc. Signed-off-by: Richard Henderson --- tcg/tcg.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) -- 2.17.2 diff --git a/tcg/tcg.c b/tcg/tcg.c index c596277fd0..7f29a2045a 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2859,7 +2859,7 @@ static void temp_allocate_frame(TCGContext *s, TCGTemp *ts) s->current_frame_offset += sizeof(tcg_target_long); } -static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet); +static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet, TCGRegSet); /* Mark a temporary as free or dead. If 'free_or_dead' is negative, mark it free; otherwise mark it dead. */ @@ -2908,7 +2908,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, break; } temp_load(s, ts, tcg_target_available_regs[ts->type], - allocated_regs); + allocated_regs, 0); /* fallthrough */ case TEMP_VAL_REG: @@ -3014,7 +3014,7 @@ static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet required_regs, /* Make sure the temporary is in a register. If needed, allocate the register from DESIRED while avoiding ALLOCATED. */ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs, - TCGRegSet allocated_regs) + TCGRegSet allocated_regs, TCGRegSet preferred_regs) { TCGReg reg; @@ -3023,13 +3023,13 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs, return; case TEMP_VAL_CONST: reg = tcg_reg_alloc(s, desired_regs, allocated_regs, - 0, ts->indirect_base); + preferred_regs, ts->indirect_base); tcg_out_movi(s, ts->type, reg, ts->val); ts->mem_coherent = 0; break; case TEMP_VAL_MEM: reg = tcg_reg_alloc(s, desired_regs, allocated_regs, - 0, ts->indirect_base); + preferred_regs, ts->indirect_base); tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); ts->mem_coherent = 1; break; @@ -3159,7 +3159,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op) the SOURCE value into its own register first, that way we don't have to reload SOURCE the next time it is used. */ if (ts->val_type == TEMP_VAL_MEM) { - temp_load(s, ts, tcg_target_available_regs[itype], allocated_regs); + temp_load(s, ts, tcg_target_available_regs[itype], allocated_regs, 0); } tcg_debug_assert(ts->val_type == TEMP_VAL_REG); @@ -3243,7 +3243,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op) goto iarg_end; } - temp_load(s, ts, arg_ct->u.regs, i_allocated_regs); + temp_load(s, ts, arg_ct->u.regs, i_allocated_regs, 0); if (arg_ct->ct & TCG_CT_IALIAS) { if (ts->fixed_reg) { @@ -3424,7 +3424,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op) if (arg != TCG_CALL_DUMMY_ARG) { ts = arg_temp(arg); temp_load(s, ts, tcg_target_available_regs[ts->type], - s->reserved_regs); + s->reserved_regs, 0); tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); } #ifndef TCG_TARGET_STACK_GROWSUP @@ -3449,7 +3449,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op) TCGRegSet arg_set = 0; tcg_regset_set_reg(arg_set, reg); - temp_load(s, ts, arg_set, allocated_regs); + temp_load(s, ts, arg_set, allocated_regs, 0); } tcg_regset_set_reg(allocated_regs, reg);