| Message ID | 20181214052410.11863-25-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: Implement ARMv8.3-PAuth | expand |
On Fri, 14 Dec 2018 at 05:24, Richard Henderson <richard.henderson@linaro.org> wrote: > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/helper.c | 70 +++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 70 insertions(+) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index b9ffc07fbc..f1e9254c9a 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -5061,6 +5061,70 @@ static CPAccessResult access_lor_other(CPUARMState *env, > return access_lor_ns(env); > } > > +#ifdef TARGET_AARCH64 > +static CPAccessResult access_pauth(CPUARMState *env, const ARMCPRegInfo *ri, > + bool isread) > +{ > + int el = arm_current_el(env); > + > + if (el < 2 && > + arm_feature(env, ARM_FEATURE_EL2) && > + !(arm_hcr_el2_eff(env) & HCR_APK)) { > + return CP_ACCESS_TRAP_EL2; > + } > + if (el < 3 && > + arm_feature(env, ARM_FEATURE_EL3) && > + !(env->cp15.scr_el3 & SCR_APK)) { > + return CP_ACCESS_TRAP_EL3; > + } > + return CP_ACCESS_OK; > +} > + > +static const ARMCPRegInfo pauth_reginfo[] = { > + { .name = "APDAKEYLOW_EL1", .state = ARM_CP_STATE_AA64, The Arm ARM uses "LO" in these register names, not "LOW". > + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 0, > + .access = PL1_RW, .accessfn = access_pauth, > + .fieldoffset = offsetof(CPUARMState, apda_key.lo) }, > + { .name = "APDAKEYHI_EL1", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 1, > + .access = PL1_RW, .accessfn = access_pauth, > + .fieldoffset = offsetof(CPUARMState, apda_key.hi) }, > + { .name = "APDBKEYLOW_EL1", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 2, > + .access = PL1_RW, .accessfn = access_pauth, > + .fieldoffset = offsetof(CPUARMState, apdb_key.lo) }, > + { .name = "APDBKEYHI_EL1", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 3, > + .access = PL1_RW, .accessfn = access_pauth, > + .fieldoffset = offsetof(CPUARMState, apdb_key.hi) }, > + { .name = "APGAKEYLOW_EL1", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 3, .opc2 = 0, > + .access = PL1_RW, .accessfn = access_pauth, > + .fieldoffset = offsetof(CPUARMState, apia_key.lo) }, Isn't this referring to the wrong field? Same with the HI version. > + { .name = "APGAKEYHI_EL1", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 3, .opc2 = 1, > + .access = PL1_RW, .accessfn = access_pauth, > + .fieldoffset = offsetof(CPUARMState, apia_key.hi) }, > + { .name = "APIAKEYLOW_EL1", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 0, > + .access = PL1_RW, .accessfn = access_pauth, > + .fieldoffset = offsetof(CPUARMState, apia_key.lo) }, > + { .name = "APIAKEYHI_EL1", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 1, > + .access = PL1_RW, .accessfn = access_pauth, > + .fieldoffset = offsetof(CPUARMState, apia_key.hi) }, > + { .name = "APIBKEYLOW_EL1", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 2, > + .access = PL1_RW, .accessfn = access_pauth, > + .fieldoffset = offsetof(CPUARMState, apib_key.lo) }, > + { .name = "APIBKEYHI_EL1", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 3, > + .access = PL1_RW, .accessfn = access_pauth, > + .fieldoffset = offsetof(CPUARMState, apib_key.hi) }, > + REGINFO_SENTINEL > +}; > +#endif Otherwise Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/target/arm/helper.c b/target/arm/helper.c index b9ffc07fbc..f1e9254c9a 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5061,6 +5061,70 @@ static CPAccessResult access_lor_other(CPUARMState *env, return access_lor_ns(env); } +#ifdef TARGET_AARCH64 +static CPAccessResult access_pauth(CPUARMState *env, const ARMCPRegInfo *ri, + bool isread) +{ + int el = arm_current_el(env); + + if (el < 2 && + arm_feature(env, ARM_FEATURE_EL2) && + !(arm_hcr_el2_eff(env) & HCR_APK)) { + return CP_ACCESS_TRAP_EL2; + } + if (el < 3 && + arm_feature(env, ARM_FEATURE_EL3) && + !(env->cp15.scr_el3 & SCR_APK)) { + return CP_ACCESS_TRAP_EL3; + } + return CP_ACCESS_OK; +} + +static const ARMCPRegInfo pauth_reginfo[] = { + { .name = "APDAKEYLOW_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 0, + .access = PL1_RW, .accessfn = access_pauth, + .fieldoffset = offsetof(CPUARMState, apda_key.lo) }, + { .name = "APDAKEYHI_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 1, + .access = PL1_RW, .accessfn = access_pauth, + .fieldoffset = offsetof(CPUARMState, apda_key.hi) }, + { .name = "APDBKEYLOW_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 2, + .access = PL1_RW, .accessfn = access_pauth, + .fieldoffset = offsetof(CPUARMState, apdb_key.lo) }, + { .name = "APDBKEYHI_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 3, + .access = PL1_RW, .accessfn = access_pauth, + .fieldoffset = offsetof(CPUARMState, apdb_key.hi) }, + { .name = "APGAKEYLOW_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 3, .opc2 = 0, + .access = PL1_RW, .accessfn = access_pauth, + .fieldoffset = offsetof(CPUARMState, apia_key.lo) }, + { .name = "APGAKEYHI_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 3, .opc2 = 1, + .access = PL1_RW, .accessfn = access_pauth, + .fieldoffset = offsetof(CPUARMState, apia_key.hi) }, + { .name = "APIAKEYLOW_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 0, + .access = PL1_RW, .accessfn = access_pauth, + .fieldoffset = offsetof(CPUARMState, apia_key.lo) }, + { .name = "APIAKEYHI_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 1, + .access = PL1_RW, .accessfn = access_pauth, + .fieldoffset = offsetof(CPUARMState, apia_key.hi) }, + { .name = "APIBKEYLOW_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 2, + .access = PL1_RW, .accessfn = access_pauth, + .fieldoffset = offsetof(CPUARMState, apib_key.lo) }, + { .name = "APIBKEYHI_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 3, + .access = PL1_RW, .accessfn = access_pauth, + .fieldoffset = offsetof(CPUARMState, apib_key.hi) }, + REGINFO_SENTINEL +}; +#endif + void register_cp_regs_for_features(ARMCPU *cpu) { /* Register all the coprocessor registers based on feature bits */ @@ -5845,6 +5909,12 @@ void register_cp_regs_for_features(ARMCPU *cpu) define_one_arm_cp_reg(cpu, &zcr_el3_reginfo); } } + +#ifdef TARGET_AARCH64 + if (cpu_isar_feature(aa64_pauth, cpu)) { + define_arm_cp_regs(cpu, pauth_reginfo); + } +#endif } void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/helper.c | 70 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) -- 2.17.2