From patchwork Mon Feb 11 23:52:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 158057 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3215414jaa; Mon, 11 Feb 2019 16:14:18 -0800 (PST) X-Google-Smtp-Source: AHgI3IaQezS+ln6NIlqj9dyFdKGAIq8wg2oKe3bqXJLRlxcyosID2Y1j/YtDj71F0/TTmFHAfBO8 X-Received: by 2002:a81:99c7:: with SMTP id q190mr695817ywg.398.1549930458515; Mon, 11 Feb 2019 16:14:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549930458; cv=none; d=google.com; s=arc-20160816; b=uzAgCTi4nxyLxqBHOuyqrheZLmGXHGw1M3Jzs4TLi9rM5u0ZIQeJTkaO3+4EsbD3xg kf0Q6gL9UEssdgAV2VW9Sg4XSvMchvQSUz+8yL6bTzmPecCuLAiUPJQIndL6FraLcVZk KCQGkrZODOBNbbk2EhFbAgrD3A9VOBZO6ApsuNGxlvIdZfSOMdKxF+v8yxLjOxygghom Xu8daf/PiTzbFoO/4UoerXJoqmooMUdNcgTlnB0ngtOl0+aqYQpv3DFl0A/eBAg3xYfq tk9Xzo7LKwrPPbsC9Dru0eZafE0WcfIIC6Lq7BEZw1c6zWGr2OylEePhBsEp+AOjy7Tv Sfnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=ah6gpD+An0QDDQ04ODgwPJ8bm3GJsZDkKDcKBtcRmis=; b=FI7tWL+hD8C+mcODKwbt95BuaYOsyxUUxBniI+fdmiZ8hrlS6OmlK4PHLHdhPQkbn6 8v6pp4tysM+oOWTx9jcsDRbb1ym8QNheZHUxBrH/PCkQR0dwQnA1mu0ve/7ZZCMiZDm7 Z/NuD6iCPLWUAnFAnCJpbF7KxvdT0N0ss0qG9NmEls6Di6XUvb2H25SNZLmVS7/5JYB0 4Sd3VGlzrOYaQBg/WKF0I3Nj0Loe5o58APqwJW2diDgRstodANEC8bYeYLIcHsViHchj OnhihSbKYM8UnGpLxzwLjIL52FK0CmpFUZMr9Gjs6y6EQrUk7OjFKWp+sl3jJn39tec7 g+9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Ixi4F8QJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id n84si3076465yba.477.2019.02.11.16.14.18 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 11 Feb 2019 16:14:18 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Ixi4F8QJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1]:58457 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gtLiM-00046l-0V for patch@linaro.org; Mon, 11 Feb 2019 19:14:18 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38691) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gtLOi-0005tA-Jw for qemu-devel@nongnu.org; Mon, 11 Feb 2019 18:54:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gtLOf-00051U-Kd for qemu-devel@nongnu.org; Mon, 11 Feb 2019 18:54:00 -0500 Received: from mail-pf1-x442.google.com ([2607:f8b0:4864:20::442]:38667) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gtLOf-0004lL-4C for qemu-devel@nongnu.org; Mon, 11 Feb 2019 18:53:57 -0500 Received: by mail-pf1-x442.google.com with SMTP id q1so336136pfi.5 for ; Mon, 11 Feb 2019 15:53:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ah6gpD+An0QDDQ04ODgwPJ8bm3GJsZDkKDcKBtcRmis=; b=Ixi4F8QJmPd2QJM/RA/0JSAyu33wFhVUY2zFQgHscupUEWikNIZZwZk/QC4WzUz/4o rtpf5apJAcjNH8/iSZdSwkBrZ4cA/qDyWEmWKhSkMyTrMT0DRGuZBnAhUwi/Fg//b959 8jvPC8o2ab4NsBIlaj/qRQAC+nfzxN6ayDtiWu+OpY54/X0/qZ0VSA+ASkqqL6CA9iSV SRJhmVDBXNArZiEhsk7G8ZGBzPz3UxeU1Jd+Rubi5+7e5FfG5itqhnfAa2P5t8vJoFND KenPAWeDLOzl7YxIoLoe5oZla3RcgyfGXSjDwR96du3NhRJn5JwY3LE3ou1WbUvBbkcA DNzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ah6gpD+An0QDDQ04ODgwPJ8bm3GJsZDkKDcKBtcRmis=; b=mdJ6e2L553fi/oYjiZ9xYXQ7HIvpK8vX1eLSZeoMPhWGWb1MxZxuhIWsUuN8zokf82 pveUuCHYiO3M7PjlY4KOej52pic/GqIph9ra6D5vYLy1jrc8yy7ivKoVR1uIRQwXMEAX Ejn662sDjRJ4M7qP6ff9lsmMIYTvliKwr6cA+f01hvmv+IdOKs5KIUlkiyAH8Kzucir1 DvdSB8Ofe0hlsYI1aA8Rhj3FPy449cAeVzpUzsIOSBmnmVvI4IMltEBL8mfCZxKx+FOT BU1ETYwbihRc6iL6ETlZ95OKz2xbO2K6EsRy1yyMO+8uu921J8y2uMPUYxtbaSwnZ8Hu BL8g== X-Gm-Message-State: AHQUAubOHHZeFmjietRQIE05SuMa9bxEvWFkU5JxGrlqrBHJXiqqTdez 6O41WYY/018cWxRIlPicrnCnTqlugnE= X-Received: by 2002:a63:d5f:: with SMTP id 31mr840515pgn.274.1549929214138; Mon, 11 Feb 2019 15:53:34 -0800 (PST) Received: from cloudburst.twiddle.net (97-113-188-82.tukw.qwest.net. [97.113.188.82]) by smtp.gmail.com with ESMTPSA id c4sm11861031pgq.85.2019.02.11.15.53.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Feb 2019 15:53:33 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 11 Feb 2019 15:52:55 -0800 Message-Id: <20190211235258.542-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190211235258.542-1-richard.henderson@linaro.org> References: <20190211235258.542-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 Subject: [Qemu-devel] [PATCH v3 25/28] target/arm: Add allocation tag storage for user mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Control this with x-tagged-pages, which is off by default. The limitation to non-shared pages is not part of a future kernel API, but a limitation of linux-user not being able to map virtual pages back to physical pages. Signed-off-by: Richard Henderson --- v2: Add the x-tagged-pages cpu property --- target/arm/cpu.h | 1 + target/arm/cpu64.c | 18 ++++++++++++++++++ target/arm/mte_helper.c | 36 ++++++++++++++++++++++++++++++++++++ 3 files changed, 55 insertions(+) -- 2.17.2 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 2626af4a9c..ec5ddfbacc 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -910,6 +910,7 @@ struct ARMCPU { #ifdef CONFIG_USER_ONLY bool guarded_pages; + bool tagged_pages; #endif QLIST_HEAD(, ARMELChangeHook) pre_el_change_hooks; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index c5675fe7d1..53a7d92c95 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -293,6 +293,18 @@ static void aarch64_cpu_set_guarded_pages(Object *obj, bool val, Error **errp) ARMCPU *cpu = ARM_CPU(obj); cpu->guarded_pages = val; } + +static bool aarch64_cpu_get_tagged_pages(Object *obj, Error **errp) +{ + ARMCPU *cpu = ARM_CPU(obj); + return cpu->tagged_pages; +} + +static void aarch64_cpu_set_tagged_pages(Object *obj, bool val, Error **errp) +{ + ARMCPU *cpu = ARM_CPU(obj); + cpu->tagged_pages = val; +} #endif /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); @@ -380,6 +392,12 @@ static void aarch64_max_initfn(Object *obj) aarch64_cpu_set_guarded_pages, NULL); object_property_set_description(obj, "x-guarded-pages", "Set on/off GuardPage bit for all pages", NULL); + + object_property_add_bool(obj, "x-tagged-pages", + aarch64_cpu_get_tagged_pages, + aarch64_cpu_set_tagged_pages, NULL); + object_property_set_description(obj, "x-tagged-pages", + "Set on/off MemAttr Tagged for all pages", NULL); #endif cpu->sve_max_vq = ARM_MAX_VQ; diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c index 6d0f82eb99..09c387e2c7 100644 --- a/target/arm/mte_helper.c +++ b/target/arm/mte_helper.c @@ -28,8 +28,44 @@ static uint8_t *allocation_tag_mem(CPUARMState *env, uint64_t ptr, bool write, uintptr_t ra) { +#ifdef CONFIG_USER_ONLY + ARMCPU *cpu = arm_env_get_cpu(env); + uint8_t *tags; + uintptr_t index; + int flags; + + flags = page_get_flags(ptr); + + if (!(flags & PAGE_VALID) || !(flags & (write ? PAGE_WRITE : PAGE_READ))) { + /* SIGSEGV */ + env->exception.vaddress = ptr; + cpu_restore_state(CPU(cpu), ra, true); + raise_exception(env, EXCP_DATA_ABORT, 0, 1); + } + + if (!cpu->tagged_pages) { + /* Tag storage is disabled. */ + return NULL; + } + if (flags & PAGE_SHARED) { + /* There may be multiple mappings; pretend not implemented. */ + return NULL; + } + + tags = page_get_target_data(ptr); + if (tags == NULL) { + size_t alloc_size = TARGET_PAGE_SIZE >> (LOG2_TAG_GRANULE + 1); + tags = page_alloc_target_data(ptr, alloc_size); + assert(tags != NULL); + } + + index = extract32(ptr, LOG2_TAG_GRANULE + 1, + TARGET_PAGE_BITS - LOG2_TAG_GRANULE - 1); + return tags + index; +#else /* Tag storage not implemented. */ return NULL; +#endif } static int get_allocation_tag(CPUARMState *env, uint64_t ptr, uintptr_t ra)