From patchwork Tue Apr 16 12:57:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 162329 Delivered-To: patch@linaro.org Received: by 2002:ac9:2a84:0:0:0:0:0 with SMTP id p4csp4024006oca; Tue, 16 Apr 2019 06:10:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqxkngbG9N5+B1Ok7UkIHNz0igURi0tA+2RnFXK17ZL2p/nmaeShOghI8nxSimaC2dBSG8l+ X-Received: by 2002:adf:de07:: with SMTP id b7mr23942124wrm.196.1555420244962; Tue, 16 Apr 2019 06:10:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555420244; cv=none; d=google.com; s=arc-20160816; b=W9bxZqxAqW+kKMyJU/b3FwhKhWbpyvvgkaQSKmHZ7jnZBujzxomOaxqmPv/kH1c0Gy 9GV5m5/L6NPy+BpaAgNxO0pAxQv69HtVrirTViuy7lrr/qU7QGq8NBd9JdZFBMF4f4TA AGK8u7pb36gSJNKvIRKSNNGwwzC27UKRitAinu6C+M0LpWX5LEhfNg5WZXOEzOy6UPrH JHPoxDyt6hgnaCznlU3nBe6zbqXTQr7mfbmBmWIvRMCSL3qHIHgArrNmFScKtOjQqybq wx8gFrSskRGAw+t800PkYqMi8xS9E1rz42cZDhBHoYPLXj6Je8EAcMr3bSBL9ORI+wtl Kb+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=tbRH/Ezbfxbs3Pgygk5ZQu6eKyrO+ofFIElvSltfNOo=; b=h7ebGtd0IxMQK8RzhVH+fHo5Eo8eGf02uy0WDVBAHlTyYN+85QR2YvMpqRMAqsJyXZ XiS0O+hur6pnRRq5kMOwIDK6CuA9Jx37DvMW1opkIVDZd9Q+TpR6lp1TVWNECmAAlu7E 6TnohZCPuWUTc3mslD2V1xyZ4DIB5L9JCTfuMTDubTNscVdFh1Mi9gfkzbx0oVptAlhj unWekdawfSSJrRplrWqNvSHDm5DIW/pxw0xJuu6UQUmaNmz3cxSLfUSLA9l3wJNMFhpx WYN1eIgOmQyZezhfUM7qYUKtfZYJFKzH5lr4lBrWEDzslLu9ZBbweM6oYMrZ82k1Wczy yZZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=A9vP0bpk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g142si12988593wmg.160.2019.04.16.06.10.44 for (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 16 Apr 2019 06:10:44 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=A9vP0bpk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1]:36514 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hGNrH-0006dL-Si for patch@linaro.org; Tue, 16 Apr 2019 09:10:43 -0400 Received: from eggs.gnu.org ([209.51.188.92]:34736) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hGNfQ-0004y1-Ob for qemu-devel@nongnu.org; Tue, 16 Apr 2019 08:58:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hGNfN-0001Ph-P6 for qemu-devel@nongnu.org; Tue, 16 Apr 2019 08:58:27 -0400 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:36439) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hGNfL-0001Na-Mv for qemu-devel@nongnu.org; Tue, 16 Apr 2019 08:58:25 -0400 Received: by mail-wr1-x442.google.com with SMTP id y13so26979473wrd.3 for ; Tue, 16 Apr 2019 05:58:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=tbRH/Ezbfxbs3Pgygk5ZQu6eKyrO+ofFIElvSltfNOo=; b=A9vP0bpklygXGRW0rxA0JfeHZRuzpet/z9aiLVI13QTur7CangcXFT15WZhWyGz4rD vcshJX0Yb6E6KhAPvL+/Sylnc0izQHA21p8aWkNDjephbziESyRc5Y/wUCi/OprmbyZ/ kdcfm55GuNrIPMLEqMoPTzNpmsowRD5O4Ra5Xi8+11DyxiGcAl5t4lHcLVLJfT/JFJ5+ 2q/6+5IxTb7163KpS0l3U17skby3qtc7JBxfKcjtiFbBh0bAWvjqmyiD4kRjt+nH5Wo6 YbJKse8K5Bf7YYph8nNNlnc+ovkCFS9bbUJsO/JV4eVTutCDj3I1cIBFFvazHbmezZ6I R1sA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tbRH/Ezbfxbs3Pgygk5ZQu6eKyrO+ofFIElvSltfNOo=; b=bkp8VbZEV8d5mpUp32TiSBTp/SBu10EUBIWmAayyOEp3Z+7k7vv5FrJ2JEtGr9lwy+ P3T5E9UmKtX6sdaaxpIfqygGEia8qegVuWTUIrnaS1yht3PpPTjF5lUJkP7+3BWUiHBq GBZ9W0+A/vy2mNezqS41ODVkyC/M63oWZZcgiZGduwJoi6QNyf9rsVUeP3TRjrHayOEk pDUX3SYuy+IgY1l+IMonWyN0ai8n/41WZbEr3D1cNvhC4V9Wef6rBcXe1krBg5Mj3QXk PZXRE/pt+GrxXV/jOUEPjZqmoJFWATQKq6glGgZjouPG/qJh0Trt4ZcjpRZhqKikOjgi dMJg== X-Gm-Message-State: APjAAAVNz1CDUk1ie4iqFE/JNMIQUbNjh3seWtcgR4Pd6+94IsMVyIhU lj/MmA6bhQL7wPzux/9WP0OfwtDYBZc= X-Received: by 2002:adf:efc1:: with SMTP id i1mr51646257wrp.199.1555419502123; Tue, 16 Apr 2019 05:58:22 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id v184sm39476572wma.6.2019.04.16.05.58.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 Apr 2019 05:58:21 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Tue, 16 Apr 2019 13:57:34 +0100 Message-Id: <20190416125744.27770-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190416125744.27770-1-peter.maydell@linaro.org> References: <20190416125744.27770-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PATCH 16/26] target/arm: Move NS TBFLAG from bit 19 to bit 6 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Move the NS TBFLAG down from bit 19 to bit 6, which has not been used since commit c1e3781090b9d36c60 in 2015, when we started passing the entire MMU index in the TB flags rather than just a 'privilege level' bit. This rearrangement is not strictly necessary, but means that we can put M-profile-only bits next to each other rather than scattered across the flag word. Signed-off-by: Peter Maydell --- target/arm/cpu.h | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 0e0cb6b2271..c436f628987 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3139,6 +3139,12 @@ FIELD(TBFLAG_ANY, BE_DATA, 23, 1) FIELD(TBFLAG_A32, THUMB, 0, 1) FIELD(TBFLAG_A32, VECLEN, 1, 3) FIELD(TBFLAG_A32, VECSTRIDE, 4, 2) +/* + * Indicates whether cp register reads and writes by guest code should access + * the secure or nonsecure bank of banked registers; note that this is not + * the same thing as the current security state of the processor! + */ +FIELD(TBFLAG_A32, NS, 6, 1) FIELD(TBFLAG_A32, VFPEN, 7, 1) FIELD(TBFLAG_A32, CONDEXEC, 8, 8) FIELD(TBFLAG_A32, SCTLR_B, 16, 1) @@ -3146,11 +3152,6 @@ FIELD(TBFLAG_A32, SCTLR_B, 16, 1) * checks on the other bits at runtime */ FIELD(TBFLAG_A32, XSCALE_CPAR, 17, 2) -/* Indicates whether cp register reads and writes by guest code should access - * the secure or nonsecure bank of banked registers; note that this is not - * the same thing as the current security state of the processor! - */ -FIELD(TBFLAG_A32, NS, 19, 1) /* For M profile only, Handler (ie not Thread) mode */ FIELD(TBFLAG_A32, HANDLER, 21, 1) /* For M profile only, whether we should generate stack-limit checks */