From patchwork Sun May 26 01:09:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 165189 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp5441339ili; Sat, 25 May 2019 18:46:52 -0700 (PDT) X-Google-Smtp-Source: APXvYqxyY1BYAr/Az2NmACwGuT3FWZGFNguTxGvsPoaDh+MH3xAL+/8jP8vshtZhTEewAarR6y05 X-Received: by 2002:a67:e905:: with SMTP id c5mr6437773vso.97.1558835212691; Sat, 25 May 2019 18:46:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558835212; cv=none; d=google.com; s=arc-20160816; b=MQdV/saw+VjspG7kMQlMswj6X6wjxzoQoNkUzlO6IbrPdLAaH3zwcAYoER1OV2y0ON yuXHH670k+9PdS4I07QRu2H4cJXDX/0lRD2B8vbYJaAesHzT5NlGf9NjfQi2CZ5hKkK4 bVoUQytqudwl/GdroJJZYzBF+rd5jUJSaBY7V3ILT5NlLtMS6sE3PTMHVU1NToboJzFL qMCYO96gybkELEqsmgLeoz7eAPV+6XD0JwtuuBT7uS4tf0Oy/oG3YTLZnNnKmHtRn165 HszjHQk81MBkK7epHLAt0XSzBIY/IvNXqOIv8IYtf0bbs3nMv0Pne3V1CrKVQJVoefEW fAag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:to:from :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date; bh=OmSQFZO3wBvDnHuwPuCqP/gKDSGfC6OxGSJhMV+r43c=; b=vt8058tjKR/dtV0IcaMiiF1+XKPsR0C19tLpSUm9l9jo5O1TWNkuaJjVTKl4vHkU1O bN+BYv3onn8glgBjKHAEjKeBZ7r5QoR18p/C224oQgMuQlHDMQVejDMoxx1b4feYt4Cq a6wzNeSQ/eNVZFYnKNxZgHHFPPNPRX9vIMroHHSJAyOy/NsOZO50p09EOCThckusZkAN 2KHzu7emfdGUDeZVKgewiGMnmsMnoS/gLhhSkM1QvWfcSF6hwDkb/z/k4IMJzzfMaN0F ke4+KlWUITv6+8wQaWrELslRrZFe9Fn426SUcp6NvtFHUbEgxc+f1vsIal0cXF5ChbhG IEyQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l23si2362253vso.71.2019.05.25.18.46.52 for (version=TLS1 cipher=AES128-SHA bits=128/128); Sat, 25 May 2019 18:46:52 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([127.0.0.1]:49411 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hUiFQ-0002qt-8f for patch@linaro.org; Sat, 25 May 2019 21:46:52 -0400 Received: from eggs.gnu.org ([209.51.188.92]:53756) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hUhxM-0003GC-Jx for qemu-devel@nongnu.org; Sat, 25 May 2019 21:28:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hUhg6-0005zu-1w for qemu-devel@nongnu.org; Sat, 25 May 2019 21:10:23 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:36186) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hUhg5-0005qv-A3 for qemu-devel@nongnu.org; Sat, 25 May 2019 21:10:21 -0400 Received: by mail-pg1-f193.google.com with SMTP id a3so7092626pgb.3 for ; Sat, 25 May 2019 18:10:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:cc:from:to; bh=OmSQFZO3wBvDnHuwPuCqP/gKDSGfC6OxGSJhMV+r43c=; b=oVU2f3jQ9M6Oo24orfHDo3nkp/qL2Bp2YAAyYXMLEO1GMKrFgY7qmI6D/8EFhCc+QO V8LUOGwEpgNrohcKWx0+SMVmh4PT8NP3/ceCw+OuLpa8/XhmNULqBVznulThRtVdQljx RK9g2jZS0XWiNxLSYVofyJcCG0nwuTzEZ4ik6Mq09vpFSAmNiIIPJHNbA1S2GCTS77PM K6jlLMZPxdhMgtmoVOZuWcI7gOUsOrq49dP6Ovz/DNsFGB6ntHGwmrqIVtlSeQvu6Z2O z/KT4kirMBi6/x1GhQOgUrONZEn361Hef8zhc8w2bMqg+j2snnTXFDzvhZxr8j6vjA9b AmBg== X-Gm-Message-State: APjAAAUjN7LABPrKpIcpIT2M0yA3uQs2R0EdxN8fxJVDQ7EFk2oJXMqu pMf+IADKCeZxU2WzsoBa2c07yg== X-Received: by 2002:aa7:9a99:: with SMTP id w25mr31312977pfi.249.1558833015176; Sat, 25 May 2019 18:10:15 -0700 (PDT) Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id p90sm17592187pfa.18.2019.05.25.18.10.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 25 May 2019 18:10:14 -0700 (PDT) Date: Sat, 25 May 2019 18:09:29 -0700 Message-Id: <20190526010948.3923-11-palmer@sifive.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190526010948.3923-1-palmer@sifive.com> References: <20190526010948.3923-1-palmer@sifive.com> MIME-Version: 1.0 From: Palmer Dabbelt To: Peter Maydell X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.215.193 Subject: [Qemu-devel] [PULL 10/29] target/riscv: Split gen_arith_imm into functional and temp X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Palmer Dabbelt , qemu-riscv@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The tcg_gen_fooi_tl functions have some immediate constant folding built in, which match up with some of the riscv asm builtin macros, like mv and not. Signed-off-by: Richard Henderson Reviewed-by: Palmer Dabbelt Signed-off-by: Palmer Dabbelt --- target/riscv/insn_trans/trans_rvi.inc.c | 14 +++++++------- target/riscv/translate.c | 19 +++++++++++++++++-- 2 files changed, 24 insertions(+), 9 deletions(-) -- 2.21.0 diff --git a/target/riscv/insn_trans/trans_rvi.inc.c b/target/riscv/insn_trans/trans_rvi.inc.c index b5a5b4a199f8..6cda078ed6ba 100644 --- a/target/riscv/insn_trans/trans_rvi.inc.c +++ b/target/riscv/insn_trans/trans_rvi.inc.c @@ -223,7 +223,7 @@ static bool trans_sd(DisasContext *ctx, arg_sd *a) static bool trans_addi(DisasContext *ctx, arg_addi *a) { - return gen_arith_imm(ctx, a, &tcg_gen_add_tl); + return gen_arith_imm_fn(ctx, a, &tcg_gen_addi_tl); } static void gen_slt(TCGv ret, TCGv s1, TCGv s2) @@ -239,25 +239,25 @@ static void gen_sltu(TCGv ret, TCGv s1, TCGv s2) static bool trans_slti(DisasContext *ctx, arg_slti *a) { - return gen_arith_imm(ctx, a, &gen_slt); + return gen_arith_imm_tl(ctx, a, &gen_slt); } static bool trans_sltiu(DisasContext *ctx, arg_sltiu *a) { - return gen_arith_imm(ctx, a, &gen_sltu); + return gen_arith_imm_tl(ctx, a, &gen_sltu); } static bool trans_xori(DisasContext *ctx, arg_xori *a) { - return gen_arith_imm(ctx, a, &tcg_gen_xor_tl); + return gen_arith_imm_fn(ctx, a, &tcg_gen_xori_tl); } static bool trans_ori(DisasContext *ctx, arg_ori *a) { - return gen_arith_imm(ctx, a, &tcg_gen_or_tl); + return gen_arith_imm_fn(ctx, a, &tcg_gen_ori_tl); } static bool trans_andi(DisasContext *ctx, arg_andi *a) { - return gen_arith_imm(ctx, a, &tcg_gen_and_tl); + return gen_arith_imm_fn(ctx, a, &tcg_gen_andi_tl); } static bool trans_slli(DisasContext *ctx, arg_slli *a) { @@ -364,7 +364,7 @@ static bool trans_and(DisasContext *ctx, arg_and *a) #ifdef TARGET_RISCV64 static bool trans_addiw(DisasContext *ctx, arg_addiw *a) { - return gen_arith_imm(ctx, a, &gen_addw); + return gen_arith_imm_tl(ctx, a, &gen_addw); } static bool trans_slliw(DisasContext *ctx, arg_slliw *a) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 8b37e0928f50..313c27b70073 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -567,8 +567,23 @@ static int ex_rvc_shifti(DisasContext *ctx, int imm) /* Include the auto-generated decoder for 32 bit insn */ #include "decode_insn32.inc.c" -static bool gen_arith_imm(DisasContext *ctx, arg_i *a, - void(*func)(TCGv, TCGv, TCGv)) +static bool gen_arith_imm_fn(DisasContext *ctx, arg_i *a, + void (*func)(TCGv, TCGv, target_long)) +{ + TCGv source1; + source1 = tcg_temp_new(); + + gen_get_gpr(source1, a->rs1); + + (*func)(source1, source1, a->imm); + + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + return true; +} + +static bool gen_arith_imm_tl(DisasContext *ctx, arg_i *a, + void (*func)(TCGv, TCGv, TCGv)) { TCGv source1, source2; source1 = tcg_temp_new();