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(localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 188D11FF93; Thu, 8 Aug 2019 17:41:19 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Thu, 8 Aug 2019 17:41:16 +0100 Message-Id: <20190808164117.23348-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190808164117.23348-1-alex.bennee@linaro.org> References: <20190808164117.23348-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 Subject: [Qemu-devel] [PATCH v1 6/7] target/riscv: rationalise softfloat includes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V TCG CPUs" , Sagar Karandikar , Bastian Koppelmann , Palmer Dabbelt , armbru@redhat.com, Alistair Francis , =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We should avoid including the whole of softfloat headers in cpu.h and explicitly include it only where we will be calling softfloat functions. We can use the -types.h and -helpers.h in cpu.h for the few bits that are global. Signed-off-by: Alex Bennée --- target/riscv/cpu.c | 1 + target/riscv/cpu.h | 2 +- target/riscv/fpu_helper.c | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) -- 2.20.1 Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f8d07bd20ad..6d52f97d7c3 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -27,6 +27,7 @@ #include "qemu/error-report.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "fpu/softfloat-helpers.h" /* RISC-V CPU definitions */ diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 0adb307f329..240b31e2ebb 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -22,7 +22,7 @@ #include "qom/cpu.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" +#include "fpu/softfloat-types.h" #define TCG_GUEST_DEFAULT_MO 0 diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index b4f818a6465..0b79562a690 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -21,6 +21,7 @@ #include "qemu/host-utils.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" +#include "fpu/softfloat.h" target_ulong riscv_cpu_get_fflags(CPURISCVState *env) {