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[209.51.188.17]) by mx.google.com with ESMTPS id y54si1732450edb.217.2019.10.17.06.33.51 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 17 Oct 2019 06:33:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=h5jx0zyI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:47908 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iL5uX-0003aZ-7d for patch@linaro.org; Thu, 17 Oct 2019 09:33:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33903) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iL5dg-00081M-Jt for qemu-devel@nongnu.org; Thu, 17 Oct 2019 09:16:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iL5de-0005PT-SZ for qemu-devel@nongnu.org; Thu, 17 Oct 2019 09:16:24 -0400 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:42411) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iL5de-0005Nq-MA for qemu-devel@nongnu.org; Thu, 17 Oct 2019 09:16:22 -0400 Received: by mail-wr1-x442.google.com with SMTP id n14so2302635wrw.9 for ; Thu, 17 Oct 2019 06:16:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lLM+xKKxPEW7VAxcx9ZcpQ8DuflKLaTBtk33YYXEM9o=; b=h5jx0zyIIhYP5HfBCpDxUm8pyJ3IONYuZjTk4ZJM7NQLrtWlWf4FU5AsIVuB4McQzF n3ZhLCAUgrcttQMc04m7ydpcNhT4LNjFXSYGXZXUoN9c8E3MHjI0yBhjAI03CN77101N oYiIx+c95oMT+I1ExVZQ4woT/l8Z5CeqdQ+r+gI56r5kK/I8q22RVjHPDRNbQrRQ8L5n 8nT1q/wCq0WG8PIP+IMa7budCnHuoM90oeibe76Oriqv7ZZMt9jNZbjAM1DZpBeaQGud YvvtBUGknanoWmZhGAJbiHo5FgEXtJ8SuLq/UWctsHLw9MhMOOMeoPnFjlC00a1tY0b6 1cCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lLM+xKKxPEW7VAxcx9ZcpQ8DuflKLaTBtk33YYXEM9o=; b=qudc9jkBWt876yeJml8VZVurEkMCAwxwd3g9jU0r3KvXN+zKh3HpWXpfbxToqZGNKU FTbAZoMKFIto/BSCrFvjhf9nP1EhdaibUrPDCsj/2Sw5ntLTIBG8a44+zURv6Pm/ij7o 7p3auvSFS4CyLcqEvZb0QfwsZmhhzkvXCedTgWu+hS5AIvD5S9z43kgztGGsXmQ+U6ln /Rm3tck9ygBGdZlZUeGp7Bq5GvijcF1E40C0Ro76uMqsxGMzYK5okLWN4g8lEtkpXCTA 4jMNRkpEz0PJeUxLVCIJLuZte1oHj2qnOOjUQ3/v8Bk8nGwVpiCCtcrV5SpHqfwTyNl4 LcgA== X-Gm-Message-State: APjAAAUTSmlilrexoJBxtaxPgzNqcZOxPNxCUhQBCYGSnV813HDMABy7 yTxvwBgOa3zzY1KIGMdE2nDTkw== X-Received: by 2002:a5d:544b:: with SMTP id w11mr1444015wrv.205.1571318181510; Thu, 17 Oct 2019 06:16:21 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id z6sm2419443wro.16.2019.10.17.06.16.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2019 06:16:21 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id DB3F41FF9B; Thu, 17 Oct 2019 14:16:16 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v6 11/54] cputlb: introduce get_page_addr_code_hostp Date: Thu, 17 Oct 2019 14:15:32 +0100 Message-Id: <20191017131615.19660-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191017131615.19660-1-alex.bennee@linaro.org> References: <20191017131615.19660-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@futurewei.com, Richard Henderson , peter.puhov@futurewei.com, aaron@os.amperecomputing.com, cota@braap.org, Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" This will be used by plugins to get the host address of instructions. Signed-off-by: Emilio G. Cota Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- accel/tcg/cputlb.c | 14 +++++++++++++- include/exec/exec-all.h | 38 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+), 1 deletion(-) -- 2.20.1 diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index a8f9069582..82a5783a2b 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1051,7 +1051,8 @@ static bool victim_tlb_hit(CPUArchState *env, size_t mmu_idx, size_t index, * NOTE: This function will trigger an exception if the page is * not executable. */ -tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) +tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, + void **hostp) { uintptr_t mmu_idx = cpu_mmu_index(env, true); uintptr_t index = tlb_index(env, mmu_idx, addr); @@ -1077,13 +1078,24 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) if (unlikely(entry->addr_code & TLB_MMIO)) { /* The region is not backed by RAM. */ + if (hostp) { + *hostp = NULL; + } return -1; } p = (void *)((uintptr_t)addr + entry->addend); + if (hostp) { + *hostp = p; + } return qemu_ram_addr_from_host_nofail(p); } +tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) +{ + return get_page_addr_code_hostp(env, addr, NULL); +} + static void notdirty_write(CPUState *cpu, vaddr mem_vaddr, unsigned size, CPUIOTLBEntry *iotlbentry, uintptr_t retaddr) { diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index e4206cb173..eadcf29d0c 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/tb-context.h" +#include "exec/cpu_ldst.h" #include "sysemu/cpus.h" /* allow to see translation results - the slowdown should be negligible, so we leave it */ @@ -516,6 +517,26 @@ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env, { return addr; } + +/** + * get_page_addr_code_hostp() - user-mode version + * @env: CPUArchState + * @addr: guest virtual address of guest code + * + * Returns @addr. + * + * If @hostp is non-NULL, sets *@hostp to the host address where @addr's content + * is kept. + */ +static inline tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, + target_ulong addr, + void **hostp) +{ + if (hostp) { + *hostp = g2h(addr); + } + return addr; +} #else static inline void mmap_lock(void) {} static inline void mmap_unlock(void) {} @@ -533,6 +554,23 @@ static inline void mmap_unlock(void) {} */ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr); +/** + * get_page_addr_code_hostp() - full-system version + * @env: CPUArchState + * @addr: guest virtual address of guest code + * + * See get_page_addr_code() (full-system version) for documentation on the + * return value. + * + * Sets *@hostp (when @hostp is non-NULL) as follows. + * If the return value is -1, sets *@hostp to NULL. Otherwise, sets *@hostp + * to the host address where @addr's content is kept. + * + * Note: this function can trigger an exception. + */ +tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, + void **hostp); + void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); void tlb_set_dirty(CPUState *cpu, target_ulong vaddr);