@@ -268,6 +268,14 @@ DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT)
#include "tcg-target.opc.h"
#endif
+#ifdef TCG_TARGET_INTERPRETER
+/* These opcodes are only for use between the tci generator and interpreter. */
+DEF(tci_movi_i32, 1, 0, 1, TCG_OPF_NOT_PRESENT)
+#if TCG_TARGET_REG_BITS == 64
+DEF(tci_movi_i64, 1, 0, 1, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT)
+#endif
+#endif
+
#undef TLADDR_ARGS
#undef DATA64_ARGS
#undef IMPL
@@ -576,7 +576,7 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
t1 = tci_read_r32(regs, &tb_ptr);
tci_write_reg32(regs, t0, t1);
break;
- case INDEX_op_movi_i32:
+ case INDEX_op_tci_movi_i32:
t0 = *tb_ptr++;
t1 = tci_read_i32(&tb_ptr);
tci_write_reg32(regs, t0, t1);
@@ -847,7 +847,7 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
t1 = tci_read_r64(regs, &tb_ptr);
tci_write_reg64(regs, t0, t1);
break;
- case INDEX_op_movi_i64:
+ case INDEX_op_tci_movi_i64:
t0 = *tb_ptr++;
t1 = tci_read_i64(&tb_ptr);
tci_write_reg64(regs, t0, t1);
@@ -530,13 +530,13 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
uint8_t *old_code_ptr = s->code_ptr;
uint32_t arg32 = arg;
if (type == TCG_TYPE_I32 || arg == arg32) {
- tcg_out_op_t(s, INDEX_op_movi_i32);
+ tcg_out_op_t(s, INDEX_op_tci_movi_i32);
tcg_out_r(s, t0);
tcg_out32(s, arg32);
} else {
tcg_debug_assert(type == TCG_TYPE_I64);
#if TCG_TARGET_REG_BITS == 64
- tcg_out_op_t(s, INDEX_op_movi_i64);
+ tcg_out_op_t(s, INDEX_op_tci_movi_i64);
tcg_out_r(s, t0);
tcg_out64(s, arg);
#else
The normal movi opcodes are going away. We need something for TCI to use internally. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- include/tcg/tcg-opc.h | 8 ++++++++ tcg/tci.c | 4 ++-- tcg/tci/tcg-target.inc.c | 4 ++-- 3 files changed, 12 insertions(+), 4 deletions(-) -- 2.20.1