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[174.21.149.226]) by smtp.gmail.com with ESMTPSA id u9sm2421775pfn.197.2020.05.08.11.26.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2020 11:26:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 06/19] tcg: Use tcg_constant_{i32, vec} with tcg vec expanders Date: Fri, 8 May 2020 11:26:03 -0700 Message-Id: <20200508182616.18318-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200508182616.18318-1-richard.henderson@linaro.org> References: <20200508182616.18318-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1041; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1041.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/tcg-op-vec.c | 63 ++++++++++++++++++++++++++---------------------- 1 file changed, 34 insertions(+), 29 deletions(-) -- 2.20.1 diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c index 43101defe4..0e3e80a612 100644 --- a/tcg/tcg-op-vec.c +++ b/tcg/tcg-op-vec.c @@ -233,25 +233,17 @@ void tcg_gen_mov_vec(TCGv_vec r, TCGv_vec a) } } -#define MO_REG (TCG_TARGET_REG_BITS == 64 ? MO_64 : MO_32) - -static void do_dupi_vec(TCGv_vec r, unsigned vece, TCGArg a) -{ - TCGTemp *rt = tcgv_vec_temp(r); - vec_gen_2(INDEX_op_dupi_vec, rt->base_type, vece, temp_arg(rt), a); -} - TCGv_vec tcg_const_zeros_vec(TCGType type) { TCGv_vec ret = tcg_temp_new_vec(type); - do_dupi_vec(ret, MO_REG, 0); + tcg_gen_mov_vec(ret, tcg_constant_vec(type, MO_8, 0)); return ret; } TCGv_vec tcg_const_ones_vec(TCGType type) { TCGv_vec ret = tcg_temp_new_vec(type); - do_dupi_vec(ret, MO_REG, -1); + tcg_gen_mov_vec(ret, tcg_constant_vec(type, MO_8, -1)); return ret; } @@ -267,37 +259,50 @@ TCGv_vec tcg_const_ones_vec_matching(TCGv_vec m) return tcg_const_ones_vec(t->base_type); } -void tcg_gen_dup64i_vec(TCGv_vec r, uint64_t a) +void tcg_gen_dupi_vec(unsigned vece, TCGv_vec dest, uint64_t val) { - if (TCG_TARGET_REG_BITS == 32 && a == deposit64(a, 32, 32, a)) { - do_dupi_vec(r, MO_32, a); - } else if (TCG_TARGET_REG_BITS == 64 || a == (uint64_t)(int32_t)a) { - do_dupi_vec(r, MO_64, a); - } else { - TCGv_i64 c = tcg_const_i64(a); - tcg_gen_dup_i64_vec(MO_64, r, c); - tcg_temp_free_i64(c); + TCGType type = tcgv_vec_temp(dest)->base_type; + + /* + * For MO_64 constants that can't be represented in tcg_target_long, + * we must use INDEX_op_dup2_vec. + */ + if (TCG_TARGET_REG_BITS == 32) { + val = dup_const(vece, val); + if (val != deposit64(val, 32, 32, val) && + val != (uint64_t)(int32_t)val) { + uint32_t vl = extract64(val, 0, 32); + uint32_t vh = extract64(val, 32, 32); + TCGArg al = tcgv_i32_arg(tcg_constant_i32(vl)); + TCGArg ah = tcgv_i32_arg(tcg_constant_i32(vh)); + TCGArg di = tcgv_vec_arg(dest); + + vec_gen_3(INDEX_op_dup2_vec, type, MO_64, di, al, ah); + return; + } } + + tcg_gen_mov_vec(dest, tcg_constant_vec(type, vece, val)); } -void tcg_gen_dup32i_vec(TCGv_vec r, uint32_t a) +void tcg_gen_dup64i_vec(TCGv_vec dest, uint64_t val) { - do_dupi_vec(r, MO_REG, dup_const(MO_32, a)); + tcg_gen_dupi_vec(MO_64, dest, val); } -void tcg_gen_dup16i_vec(TCGv_vec r, uint32_t a) +void tcg_gen_dup32i_vec(TCGv_vec dest, uint32_t val) { - do_dupi_vec(r, MO_REG, dup_const(MO_16, a)); + tcg_gen_dupi_vec(MO_32, dest, val); } -void tcg_gen_dup8i_vec(TCGv_vec r, uint32_t a) +void tcg_gen_dup16i_vec(TCGv_vec dest, uint32_t val) { - do_dupi_vec(r, MO_REG, dup_const(MO_8, a)); + tcg_gen_dupi_vec(MO_16, dest, val); } -void tcg_gen_dupi_vec(unsigned vece, TCGv_vec r, uint64_t a) +void tcg_gen_dup8i_vec(TCGv_vec dest, uint32_t val) { - do_dupi_vec(r, MO_REG, dup_const(vece, a)); + tcg_gen_dupi_vec(MO_8, dest, val); } void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec r, TCGv_i64 a) @@ -502,8 +507,8 @@ void tcg_gen_abs_vec(unsigned vece, TCGv_vec r, TCGv_vec a) if (tcg_can_emit_vec_op(INDEX_op_sari_vec, type, vece) > 0) { tcg_gen_sari_vec(vece, t, a, (8 << vece) - 1); } else { - do_dupi_vec(t, MO_REG, 0); - tcg_gen_cmp_vec(TCG_COND_LT, vece, t, a, t); + tcg_gen_cmp_vec(TCG_COND_LT, vece, t, a, + tcg_constant_vec(type, vece, 0)); } tcg_gen_xor_vec(vece, r, a, t); tcg_gen_sub_vec(vece, r, r, t);