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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Emilio G. Cota [RF: Converted code in target/mips/kvm.c to cpu_halted.] Signed-off-by: Robert Foley --- hw/mips/cps.c | 2 +- hw/misc/mips_itu.c | 4 ++-- target/mips/cp0_helper.c | 6 +++--- target/mips/kvm.c | 2 +- target/mips/op_helper.c | 2 +- target/mips/translate.c | 4 ++-- 6 files changed, 10 insertions(+), 10 deletions(-) -- 2.17.1 diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 92b9b1a5f6..0123510fab 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -54,7 +54,7 @@ static void main_cpu_reset(void *opaque) cpu_reset(cs); /* All VPs are halted on reset. Leave powering up to CPC. */ - cs->halted = 1; + cpu_halted_set(cs, 1); } static bool cpu_mips_itu_supported(CPUMIPSState *env) diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c index 3540985258..623a600ed1 100644 --- a/hw/misc/mips_itu.c +++ b/hw/misc/mips_itu.c @@ -183,7 +183,7 @@ static void wake_blocked_threads(ITCStorageCell *c) { CPUState *cs; CPU_FOREACH(cs) { - if (cs->halted && (c->blocked_threads & (1ULL << cs->cpu_index))) { + if (cpu_halted(cs) && (c->blocked_threads & (1ULL << cs->cpu_index))) { cpu_interrupt(cs, CPU_INTERRUPT_WAKE); } } @@ -193,7 +193,7 @@ static void wake_blocked_threads(ITCStorageCell *c) static void QEMU_NORETURN block_thread_and_exit(ITCStorageCell *c) { c->blocked_threads |= 1ULL << current_cpu->cpu_index; - current_cpu->halted = 1; + cpu_halted_set(current_cpu, 1); current_cpu->exception_index = EXCP_HLT; cpu_loop_exit_restore(current_cpu, current_cpu->mem_io_pc); } diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c index bbf12e4a97..4d413c24d3 100644 --- a/target/mips/cp0_helper.c +++ b/target/mips/cp0_helper.c @@ -43,7 +43,7 @@ static bool mips_vpe_is_wfi(MIPSCPU *c) * If the VPE is halted but otherwise active, it means it's waiting for * an interrupt.\ */ - return cpu->halted && mips_vpe_active(env); + return cpu_halted(cpu) && mips_vpe_active(env); } static bool mips_vp_is_wfi(MIPSCPU *c) @@ -51,7 +51,7 @@ static bool mips_vp_is_wfi(MIPSCPU *c) CPUState *cpu = CPU(c); CPUMIPSState *env = &c->env; - return cpu->halted && mips_vp_active(env); + return cpu_halted(cpu) && mips_vp_active(env); } static inline void mips_vpe_wake(MIPSCPU *c) @@ -74,7 +74,7 @@ static inline void mips_vpe_sleep(MIPSCPU *cpu) * The VPE was shut off, really go to bed. * Reset any old _WAKE requests. */ - cs->halted = 1; + cpu_halted_set(cs, 1); cpu_reset_interrupt(cs, CPU_INTERRUPT_WAKE); } diff --git a/target/mips/kvm.c b/target/mips/kvm.c index de3e26ef1f..2b7d680547 100644 --- a/target/mips/kvm.c +++ b/target/mips/kvm.c @@ -162,7 +162,7 @@ MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) int kvm_arch_process_async_events(CPUState *cs) { - return cs->halted; + return cpu_halted(cs); } int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index 9552b280e0..152b45826c 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -1124,7 +1124,7 @@ void helper_wait(CPUMIPSState *env) { CPUState *cs = env_cpu(env); - cs->halted = 1; + cpu_halted_set(cs, 1); cpu_reset_interrupt(cs, CPU_INTERRUPT_WAKE); /* * Last instruction in the block, PC was updated before diff --git a/target/mips/translate.c b/target/mips/translate.c index 25b595a17d..35ea86a49b 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31328,7 +31328,7 @@ void cpu_state_reset(CPUMIPSState *env) env->tcs[i].CP0_TCHalt = 1; } env->active_tc.CP0_TCHalt = 1; - cs->halted = 1; + cpu_halted_set(cs, 1); if (cs->cpu_index == 0) { /* VPE0 starts up enabled. */ @@ -31336,7 +31336,7 @@ void cpu_state_reset(CPUMIPSState *env) env->CP0_VPEConf0 |= (1 << CP0VPEC0_MVP) | (1 << CP0VPEC0_VPA); /* TC0 starts up unhalted. */ - cs->halted = 0; + cpu_halted_set(cs, 0); env->active_tc.CP0_TCHalt = 0; env->tcs[0].CP0_TCHalt = 0; /* With thread 0 active. */