diff mbox series

[RISU,v2,01/22] sve2.risu: Add patterns for floating-point pairwise ops

Message ID 20200521192511.6623-2-steplong@quicinc.com
State New
Headers show
Series Add risu patterns for SVE2 instructions | expand

Commit Message

Stephen Long May 21, 2020, 7:24 p.m. UTC 
Signed-off-by: Stephen Long <steplong@quicinc.com>
---
 sve2.risu | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
 create mode 100755 sve2.risu
diff mbox series

Patch

diff --git a/sve2.risu b/sve2.risu
new file mode 100755
index 0000000..78debd9
--- /dev/null
+++ b/sve2.risu
@@ -0,0 +1,14 @@ 
+# Input file for risugen defining AArch64 SVE2 instructions
+.mode arm.aarch64
+
+# Floating Point Pairwise
+FADDP       A64_V    01100100 size:2 010 000 100 pg:3 zm:5 zdn:5 \
+!constraints { $size != 0; }
+FMAXNMP     A64_V    01100100 size:2 010 100 100 pg:3 zm:5 zdn:5 \
+!constraints { $size != 0; }
+FMINNMP     A64_V    01100100 size:2 010 101 100 pg:3 zm:5 zdn:5 \
+!constraints { $size != 0; }
+FMAXP       A64_V    01100100 size:2 010 110 100 pg:3 zm:5 zdn:5 \
+!constraints { $size != 0; }
+FMINP       A64_V    01100100 size:2 010 111 100 pg:3 zm:5 zdn:5 \
+!constraints { $size != 0; }