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Tue, 9 Jun 2020 12:23:47 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9768078FA9; Tue, 9 Jun 2020 12:23:44 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 280D01138468; Tue, 9 Jun 2020 14:23:40 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 19/24] riscv: Fix to put "riscv.hart_array" devices on sysbus Date: Tue, 9 Jun 2020 14:23:34 +0200 Message-Id: <20200609122339.937862-20-armbru@redhat.com> In-Reply-To: <20200609122339.937862-1-armbru@redhat.com> References: <20200609122339.937862-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 02:44:16 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: berrange@redhat.com, ehabkost@redhat.com, Sagar Karandikar , Bastian Koppelmann , Alistair Francis , qemu-riscv@nongnu.org, pbonzini@redhat.com, Palmer Dabbelt Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" riscv_sifive_e_soc_init(), riscv_sifive_u_soc_init(), spike_board_init(), spike_v1_10_0_board_init(), spike_v1_09_1_board_init(), and riscv_virt_board_init() create "riscv-hart_array" sysbus devices in a way that leaves them unplugged. Create them the common way that puts them into the main system bus. Affects machines sifive_e, sifive_u, spike, spike_v1.10, spike_v1.9.1, and virt. Visible in "info qtree", here's the change for sifive_e: bus: main-system-bus type System + dev: riscv.hart_array, id "" + num-harts = 1 (0x1) + hartid-base = 0 (0x0) + cpu-type = "sifive-e31-riscv-cpu" dev: sifive_soc.gpio, id "" Cc: Palmer Dabbelt Cc: Alistair Francis Cc: Sagar Karandikar Cc: Bastian Koppelmann Cc: qemu-riscv@nongnu.org Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis --- hw/riscv/opentitan.c | 5 ++--- hw/riscv/sifive_e.c | 5 ++--- hw/riscv/sifive_u.c | 14 ++++++-------- hw/riscv/spike.c | 4 ++-- hw/riscv/virt.c | 4 ++-- 5 files changed, 14 insertions(+), 18 deletions(-) diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index b4fb836466..29887fe363 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -94,9 +94,8 @@ static void riscv_lowrisc_ibex_soc_init(Object *obj) { LowRISCIbexSoCState *s = RISCV_IBEX_SOC(obj); - object_initialize_child(obj, "cpus", &s->cpus, - sizeof(s->cpus), TYPE_RISCV_HART_ARRAY, - &error_abort, NULL); + sysbus_init_child_obj(obj, "cpus", &s->cpus, + sizeof(s->cpus), TYPE_RISCV_HART_ARRAY); } static void riscv_lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 472a98970b..d2e2350a4d 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -149,9 +149,8 @@ static void riscv_sifive_e_soc_init(Object *obj) MachineState *ms = MACHINE(qdev_get_machine()); SiFiveESoCState *s = RISCV_E_SOC(obj); - object_initialize_child(obj, "cpus", &s->cpus, - sizeof(s->cpus), TYPE_RISCV_HART_ARRAY, - &error_abort, NULL); + sysbus_init_child_obj(obj, "cpus", &s->cpus, + sizeof(s->cpus), TYPE_RISCV_HART_ARRAY); object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts", &error_abort); sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0", diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index f9fef2be91..d6c6364596 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -491,10 +491,9 @@ static void sifive_u_soc_instance_init(Object *obj) &error_abort, NULL); qdev_prop_set_uint32(DEVICE(&s->e_cluster), "cluster-id", 0); - object_initialize_child(OBJECT(&s->e_cluster), "e-cpus", - &s->e_cpus, sizeof(s->e_cpus), - TYPE_RISCV_HART_ARRAY, &error_abort, - NULL); + sysbus_init_child_obj(OBJECT(&s->e_cluster), "e-cpus", + &s->e_cpus, sizeof(s->e_cpus), + TYPE_RISCV_HART_ARRAY); qdev_prop_set_uint32(DEVICE(&s->e_cpus), "num-harts", 1); qdev_prop_set_uint32(DEVICE(&s->e_cpus), "hartid-base", 0); qdev_prop_set_string(DEVICE(&s->e_cpus), "cpu-type", SIFIVE_E_CPU); @@ -504,10 +503,9 @@ static void sifive_u_soc_instance_init(Object *obj) &error_abort, NULL); qdev_prop_set_uint32(DEVICE(&s->u_cluster), "cluster-id", 1); - object_initialize_child(OBJECT(&s->u_cluster), "u-cpus", - &s->u_cpus, sizeof(s->u_cpus), - TYPE_RISCV_HART_ARRAY, &error_abort, - NULL); + sysbus_init_child_obj(OBJECT(&s->u_cluster), "u-cpus", + &s->u_cpus, sizeof(s->u_cpus), + TYPE_RISCV_HART_ARRAY); qdev_prop_set_uint32(DEVICE(&s->u_cpus), "num-harts", ms->smp.cpus - 1); qdev_prop_set_uint32(DEVICE(&s->u_cpus), "hartid-base", 1); qdev_prop_set_string(DEVICE(&s->u_cpus), "cpu-type", SIFIVE_U_CPU); diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 7bbbdb5036..7d1119dcb6 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -169,8 +169,8 @@ static void spike_board_init(MachineState *machine) unsigned int smp_cpus = machine->smp.cpus; /* Initialize SOC */ - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_RISCV_HART_ARRAY, &error_abort, NULL); + sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), + TYPE_RISCV_HART_ARRAY); object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 4e4c494a70..d569b38d1b 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -485,8 +485,8 @@ static void virt_machine_init(MachineState *machine) unsigned int smp_cpus = machine->smp.cpus; /* Initialize SOC */ - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_RISCV_HART_ARRAY, &error_abort, NULL); + sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), + TYPE_RISCV_HART_ARRAY); object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts",