@@ -13,6 +13,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "qom/object.h"
#define SWIM_MAX_FD 2
@@ -67,10 +68,11 @@ struct SWIMCtrl {
};
#define TYPE_SWIM "swim"
+typedef struct Swim Swim;
#define SWIM(obj) OBJECT_CHECK(Swim, (obj), TYPE_SWIM)
-typedef struct Swim {
+struct Swim {
SysBusDevice parent_obj;
SWIMCtrl ctrl;
-} Swim;
+};
#endif
@@ -16,6 +16,7 @@
#include "qemu/osdep.h"
#include "exec/memory.h"
#include "ui/console.h"
+#include "qom/object.h"
typedef struct MacfbState {
MemoryRegion mem_vram;
@@ -31,34 +32,37 @@ typedef struct MacfbState {
} MacfbState;
#define TYPE_MACFB "sysbus-macfb"
+typedef struct MacfbSysBusState MacfbSysBusState;
#define MACFB(obj) \
OBJECT_CHECK(MacfbSysBusState, (obj), TYPE_MACFB)
-typedef struct {
+struct MacfbSysBusState {
SysBusDevice busdev;
MacfbState macfb;
-} MacfbSysBusState;
+};
+#define TYPE_NUBUS_MACFB "nubus-macfb"
+typedef struct MacfbNubusDeviceClass MacfbNubusDeviceClass;
+typedef struct MacfbNubusState MacfbNubusState;
#define NUBUS_MACFB_CLASS(class) \
OBJECT_CLASS_CHECK(MacfbNubusDeviceClass, (class), TYPE_NUBUS_MACFB)
#define NUBUS_MACFB_GET_CLASS(obj) \
OBJECT_GET_CLASS(MacfbNubusDeviceClass, (obj), TYPE_NUBUS_MACFB)
-typedef struct MacfbNubusDeviceClass {
+struct MacfbNubusDeviceClass {
DeviceClass parent_class;
DeviceRealize parent_realize;
-} MacfbNubusDeviceClass;
+};
-#define TYPE_NUBUS_MACFB "nubus-macfb"
#define NUBUS_MACFB(obj) \
OBJECT_CHECK(MacfbNubusState, (obj), TYPE_NUBUS_MACFB)
-typedef struct {
+struct MacfbNubusState {
NubusDevice busdev;
MacfbState macfb;
-} MacfbNubusState;
+};
#endif
@@ -143,6 +143,7 @@
#include "sysemu/kvm.h"
#include "hw/sysbus.h"
#include "hw/ppc/xive_regs.h"
+#include "qom/object.h"
/*
* XIVE Notifier (Interface between Source and Router)
@@ -153,21 +154,23 @@ typedef struct XiveNotifier XiveNotifier;
#define TYPE_XIVE_NOTIFIER "xive-notifier"
#define XIVE_NOTIFIER(obj) \
INTERFACE_CHECK(XiveNotifier, (obj), TYPE_XIVE_NOTIFIER)
+typedef struct XiveNotifierClass XiveNotifierClass;
#define XIVE_NOTIFIER_CLASS(klass) \
OBJECT_CLASS_CHECK(XiveNotifierClass, (klass), TYPE_XIVE_NOTIFIER)
#define XIVE_NOTIFIER_GET_CLASS(obj) \
OBJECT_GET_CLASS(XiveNotifierClass, (obj), TYPE_XIVE_NOTIFIER)
-typedef struct XiveNotifierClass {
+struct XiveNotifierClass {
InterfaceClass parent;
void (*notify)(XiveNotifier *xn, uint32_t lisn);
-} XiveNotifierClass;
+};
/*
* XIVE Interrupt Source
*/
#define TYPE_XIVE_SOURCE "xive-source"
+typedef struct XiveSource XiveSource;
#define XIVE_SOURCE(obj) OBJECT_CHECK(XiveSource, (obj), TYPE_XIVE_SOURCE)
/*
@@ -177,7 +180,7 @@ typedef struct XiveNotifierClass {
#define XIVE_SRC_H_INT_ESB 0x1 /* ESB managed with hcall H_INT_ESB */
#define XIVE_SRC_STORE_EOI 0x2 /* Store EOI supported */
-typedef struct XiveSource {
+struct XiveSource {
DeviceState parent;
/* IRQs */
@@ -198,7 +201,7 @@ typedef struct XiveSource {
MemoryRegion esb_mmio_kvm;
XiveNotifier *xive;
-} XiveSource;
+};
/*
* ESB MMIO setting. Can be one page, for both source triggering and
@@ -304,6 +307,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val);
*/
#define TYPE_XIVE_TCTX "xive-tctx"
+typedef struct XiveTCTX XiveTCTX;
#define XIVE_TCTX(obj) OBJECT_CHECK(XiveTCTX, (obj), TYPE_XIVE_TCTX)
/*
@@ -319,7 +323,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val);
typedef struct XivePresenter XivePresenter;
-typedef struct XiveTCTX {
+struct XiveTCTX {
DeviceState parent_obj;
CPUState *cs;
@@ -329,20 +333,22 @@ typedef struct XiveTCTX {
uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE];
XivePresenter *xptr;
-} XiveTCTX;
+};
/*
* XIVE Router
*/
typedef struct XiveFabric XiveFabric;
-typedef struct XiveRouter {
+struct XiveRouter {
SysBusDevice parent;
XiveFabric *xfb;
-} XiveRouter;
+};
+typedef struct XiveRouter XiveRouter;
#define TYPE_XIVE_ROUTER "xive-router"
+typedef struct XiveRouterClass XiveRouterClass;
#define XIVE_ROUTER(obj) \
OBJECT_CHECK(XiveRouter, (obj), TYPE_XIVE_ROUTER)
#define XIVE_ROUTER_CLASS(klass) \
@@ -350,7 +356,7 @@ typedef struct XiveRouter {
#define XIVE_ROUTER_GET_CLASS(obj) \
OBJECT_GET_CLASS(XiveRouterClass, (obj), TYPE_XIVE_ROUTER)
-typedef struct XiveRouterClass {
+struct XiveRouterClass {
SysBusDeviceClass parent;
/* XIVE table accessors */
@@ -365,7 +371,7 @@ typedef struct XiveRouterClass {
int (*write_nvt)(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx,
XiveNVT *nvt, uint8_t word_number);
uint8_t (*get_block_id)(XiveRouter *xrtr);
-} XiveRouterClass;
+};
int xive_router_get_eas(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx,
XiveEAS *eas);
@@ -391,19 +397,20 @@ typedef struct XiveTCTXMatch {
#define TYPE_XIVE_PRESENTER "xive-presenter"
#define XIVE_PRESENTER(obj) \
INTERFACE_CHECK(XivePresenter, (obj), TYPE_XIVE_PRESENTER)
+typedef struct XivePresenterClass XivePresenterClass;
#define XIVE_PRESENTER_CLASS(klass) \
OBJECT_CLASS_CHECK(XivePresenterClass, (klass), TYPE_XIVE_PRESENTER)
#define XIVE_PRESENTER_GET_CLASS(obj) \
OBJECT_GET_CLASS(XivePresenterClass, (obj), TYPE_XIVE_PRESENTER)
-typedef struct XivePresenterClass {
+struct XivePresenterClass {
InterfaceClass parent;
int (*match_nvt)(XivePresenter *xptr, uint8_t format,
uint8_t nvt_blk, uint32_t nvt_idx,
bool cam_ignore, uint8_t priority,
uint32_t logic_serv, XiveTCTXMatch *match);
bool (*in_kernel)(const XivePresenter *xptr);
-} XivePresenterClass;
+};
int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
uint8_t format,
@@ -417,28 +424,30 @@ int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
#define TYPE_XIVE_FABRIC "xive-fabric"
#define XIVE_FABRIC(obj) \
INTERFACE_CHECK(XiveFabric, (obj), TYPE_XIVE_FABRIC)
+typedef struct XiveFabricClass XiveFabricClass;
#define XIVE_FABRIC_CLASS(klass) \
OBJECT_CLASS_CHECK(XiveFabricClass, (klass), TYPE_XIVE_FABRIC)
#define XIVE_FABRIC_GET_CLASS(obj) \
OBJECT_GET_CLASS(XiveFabricClass, (obj), TYPE_XIVE_FABRIC)
-typedef struct XiveFabricClass {
+struct XiveFabricClass {
InterfaceClass parent;
int (*match_nvt)(XiveFabric *xfb, uint8_t format,
uint8_t nvt_blk, uint32_t nvt_idx,
bool cam_ignore, uint8_t priority,
uint32_t logic_serv, XiveTCTXMatch *match);
-} XiveFabricClass;
+};
/*
* XIVE END ESBs
*/
#define TYPE_XIVE_END_SOURCE "xive-end-source"
+typedef struct XiveENDSource XiveENDSource;
#define XIVE_END_SOURCE(obj) \
OBJECT_CHECK(XiveENDSource, (obj), TYPE_XIVE_END_SOURCE)
-typedef struct XiveENDSource {
+struct XiveENDSource {
DeviceState parent;
uint32_t nr_ends;
@@ -448,7 +457,7 @@ typedef struct XiveENDSource {
MemoryRegion esb_mmio;
XiveRouter *xrtr;
-} XiveENDSource;
+};
/*
* For legacy compatibility, the exceptions define up to 256 different
@@ -19,6 +19,7 @@
#define INTERFACE_RDMA_PROVIDER "rdma"
+typedef struct RdmaProviderClass RdmaProviderClass;
#define RDMA_PROVIDER_CLASS(klass) \
OBJECT_CLASS_CHECK(RdmaProviderClass, (klass), \
INTERFACE_RDMA_PROVIDER)
@@ -31,10 +32,10 @@
typedef struct RdmaProvider RdmaProvider;
-typedef struct RdmaProviderClass {
+struct RdmaProviderClass {
InterfaceClass parent;
void (*print_statistics)(Monitor *mon, RdmaProvider *obj);
-} RdmaProviderClass;
+};
#endif
@@ -21,6 +21,7 @@
#include "qemu/coroutine_int.h"
#include "io/channel.h"
#include "net/announce.h"
+#include "qom/object.h"
struct PostcopyBlocktimeContext;
@@ -114,6 +115,7 @@ void fill_destination_postcopy_migration_info(MigrationInfo *info);
#define TYPE_MIGRATION "migration"
+typedef struct MigrationClass MigrationClass;
#define MIGRATION_OBJ_CLASS(klass) \
OBJECT_CLASS_CHECK(MigrationClass, (klass), TYPE_MIGRATION)
#define MIGRATION_OBJ(obj) \
@@ -121,10 +123,10 @@ void fill_destination_postcopy_migration_info(MigrationInfo *info);
#define MIGRATION_OBJ_GET_CLASS(obj) \
OBJECT_GET_CLASS(MigrationClass, (obj), TYPE_MIGRATION)
-typedef struct MigrationClass {
+struct MigrationClass {
/*< private >*/
DeviceClass parent_class;
-} MigrationClass;
+};
struct MigrationState
{
@@ -20,12 +20,14 @@
#define RX_CPU_QOM_H
#include "hw/core/cpu.h"
+#include "qom/object.h"
#define TYPE_RX_CPU "rx-cpu"
#define TYPE_RX62N_CPU RX_CPU_TYPE_NAME("rx62n")
typedef struct RXCPU RXCPU;
+typedef struct RXCPUClass RXCPUClass;
#define RX_CPU_CLASS(klass) \
OBJECT_CLASS_CHECK(RXCPUClass, (klass), TYPE_RX_CPU)
#define RX_CPU(obj) \
@@ -40,14 +42,14 @@ typedef struct RXCPU RXCPU;
*
* A RX CPU model.
*/
-typedef struct RXCPUClass {
+struct RXCPUClass {
/*< private >*/
CPUClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
DeviceReset parent_reset;
-} RXCPUClass;
+};
#define CPUArchState struct CPURXState
@@ -26,12 +26,14 @@
#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/sd/sd.h"
+#include "qom/object.h"
#define TYPE_INTEGRATOR_CM "integrator_core"
+typedef struct IntegratorCMState IntegratorCMState;
#define INTEGRATOR_CM(obj) \
OBJECT_CHECK(IntegratorCMState, (obj), TYPE_INTEGRATOR_CM)
-typedef struct IntegratorCMState {
+struct IntegratorCMState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
@@ -51,7 +53,7 @@ typedef struct IntegratorCMState {
uint32_t int_level;
uint32_t irq_enabled;
uint32_t fiq_enabled;
-} IntegratorCMState;
+};
static uint8_t integrator_spd[128] = {
128, 8, 4, 11, 9, 1, 64, 0, 2, 0xa0, 0xa0, 0, 0, 8, 0, 1,
@@ -326,10 +328,11 @@ static void integratorcm_realize(DeviceState *d, Error **errp)
/* Primary interrupt controller. */
#define TYPE_INTEGRATOR_PIC "integrator_pic"
+typedef struct icp_pic_state icp_pic_state;
#define INTEGRATOR_PIC(obj) \
OBJECT_CHECK(icp_pic_state, (obj), TYPE_INTEGRATOR_PIC)
-typedef struct icp_pic_state {
+struct icp_pic_state {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
@@ -340,7 +343,7 @@ typedef struct icp_pic_state {
uint32_t fiq_enabled;
qemu_irq parent_irq;
qemu_irq parent_fiq;
-} icp_pic_state;
+};
static const VMStateDescription vmstate_icp_pic = {
.name = "icp_pic",
@@ -465,10 +468,11 @@ static void icp_pic_init(Object *obj)
/* CP control registers. */
#define TYPE_ICP_CONTROL_REGS "icp-ctrl-regs"
+typedef struct ICPCtrlRegsState ICPCtrlRegsState;
#define ICP_CONTROL_REGS(obj) \
OBJECT_CHECK(ICPCtrlRegsState, (obj), TYPE_ICP_CONTROL_REGS)
-typedef struct ICPCtrlRegsState {
+struct ICPCtrlRegsState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
@@ -477,7 +481,7 @@ typedef struct ICPCtrlRegsState {
qemu_irq mmc_irq;
uint32_t intreg_state;
-} ICPCtrlRegsState;
+};
#define ICP_GPIO_MMC_WPROT "mmc-wprot"
#define ICP_GPIO_MMC_CARDIN "mmc-cardin"
@@ -26,6 +26,7 @@
#include "qemu/error-report.h"
#include "hw/char/pl011.h"
#include "hw/sd/sd.h"
+#include "qom/object.h"
#define VERSATILE_FLASH_ADDR 0x34000000
#define VERSATILE_FLASH_SIZE (64 * 1024 * 1024)
@@ -34,10 +35,11 @@
/* Primary interrupt controller. */
#define TYPE_VERSATILE_PB_SIC "versatilepb_sic"
+typedef struct vpb_sic_state vpb_sic_state;
#define VERSATILE_PB_SIC(obj) \
OBJECT_CHECK(vpb_sic_state, (obj), TYPE_VERSATILE_PB_SIC)
-typedef struct vpb_sic_state {
+struct vpb_sic_state {
SysBusDevice parent_obj;
MemoryRegion iomem;
@@ -46,7 +48,7 @@ typedef struct vpb_sic_state {
uint32_t pic_enable;
qemu_irq parent[32];
int irq;
-} vpb_sic_state;
+};
static const VMStateDescription vmstate_vpb_sic = {
.name = "versatilepb_sic",
@@ -44,6 +44,7 @@
#include "hw/cpu/a15mpcore.h"
#include "hw/i2c/arm_sbcon_i2c.h"
#include "hw/sd/sd.h"
+#include "qom/object.h"
#define VEXPRESS_BOARD_ID 0x8e0
#define VEXPRESS_FLASH_SIZE (64 * 1024 * 1024)
@@ -166,16 +167,18 @@ static hwaddr motherboard_aseries_map[] = {
typedef struct VEDBoardInfo VEDBoardInfo;
-typedef struct {
+struct VexpressMachineClass {
MachineClass parent;
VEDBoardInfo *daughterboard;
-} VexpressMachineClass;
+};
+typedef struct VexpressMachineClass VexpressMachineClass;
-typedef struct {
+struct VexpressMachineState {
MachineState parent;
bool secure;
bool virt;
-} VexpressMachineState;
+};
+typedef struct VexpressMachineState VexpressMachineState;
#define TYPE_VEXPRESS_MACHINE "vexpress"
#define TYPE_VEXPRESS_A9_MACHINE MACHINE_TYPE_NAME("vexpress-a9")
@@ -18,15 +18,17 @@
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "trace.h"
+#include "qom/object.h"
#define PL181_FIFO_LEN 16
#define TYPE_PL181 "pl181"
+typedef struct PL181State PL181State;
#define PL181(obj) OBJECT_CHECK(PL181State, (obj), TYPE_PL181)
#define TYPE_PL181_BUS "pl181-bus"
-typedef struct PL181State {
+struct PL181State {
SysBusDevice parent_obj;
MemoryRegion iomem;
@@ -56,7 +58,7 @@ typedef struct PL181State {
/* GPIO outputs for 'card is readonly' and 'card inserted' */
qemu_irq card_readonly;
qemu_irq card_inserted;
-} PL181State;
+};
static const VMStateDescription vmstate_pl181 = {
.name = "pl181",