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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id 205sm6296620wme.38.2020.10.11.12.03.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 12:03:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH] hw/pci-host/grackle: Verify PIC link is properly set Date: Sun, 11 Oct 2020 21:03:32 +0200 Message-Id: <20201011190332.3189611-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , David Gibson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The Grackle PCI host model expects the interrupt controller being set, but does not verify it is present. Add a check to help developers using this model. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-host/grackle.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index 57c29b20afb..20361d215ca 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -76,6 +76,10 @@ static void grackle_realize(DeviceState *dev, Error **errp) GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev); PCIHostState *phb = PCI_HOST_BRIDGE(dev); + if (!s->pic) { + error_setg(errp, TYPE_GRACKLE_PCI_HOST_BRIDGE ": 'pic' link not set"); + return; + } phb->bus = pci_register_root_bus(dev, NULL, pci_grackle_set_irq, pci_grackle_map_irq,