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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 23/27] accel/tcg: rename tb_lookup__cpu_state and hoist state extraction Date: Tue, 2 Mar 2021 09:57:37 -0800 Message-Id: <20210302175741.1079851-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Alex Bennée Having a function return either and valid TB and some system state seems excessive. It will make the subsequent re-factoring easier if we lookup the current state where we are. Signed-off-by: Alex Bennée Message-Id: <20210224165811.11567-2-alex.bennee@linaro.org> Signed-off-by: Richard Henderson --- include/exec/tb-lookup.h | 18 ++++++++---------- accel/tcg/cpu-exec.c | 10 ++++++++-- accel/tcg/tcg-runtime.c | 4 +++- 3 files changed, 19 insertions(+), 13 deletions(-) -- 2.25.1 diff --git a/include/exec/tb-lookup.h b/include/exec/tb-lookup.h index 9cf475bb03..62a509535d 100644 --- a/include/exec/tb-lookup.h +++ b/include/exec/tb-lookup.h @@ -17,30 +17,28 @@ #include "exec/tb-hash.h" /* Might cause an exception, so have a longjmp destination ready */ -static inline TranslationBlock * -tb_lookup__cpu_state(CPUState *cpu, target_ulong *pc, target_ulong *cs_base, - uint32_t *flags, uint32_t cf_mask) +static inline TranslationBlock * tb_lookup(CPUState *cpu, + target_ulong pc, target_ulong cs_base, + uint32_t flags, uint32_t cf_mask) { - CPUArchState *env = (CPUArchState *)cpu->env_ptr; TranslationBlock *tb; uint32_t hash; - cpu_get_tb_cpu_state(env, pc, cs_base, flags); - hash = tb_jmp_cache_hash_func(*pc); + hash = tb_jmp_cache_hash_func(pc); tb = qatomic_rcu_read(&cpu->tb_jmp_cache[hash]); cf_mask &= ~CF_CLUSTER_MASK; cf_mask |= cpu->cluster_index << CF_CLUSTER_SHIFT; if (likely(tb && - tb->pc == *pc && - tb->cs_base == *cs_base && - tb->flags == *flags && + tb->pc == pc && + tb->cs_base == cs_base && + tb->flags == flags && tb->trace_vcpu_dstate == *cpu->trace_dstate && (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == cf_mask)) { return tb; } - tb = tb_htable_lookup(cpu, *pc, *cs_base, *flags, cf_mask); + tb = tb_htable_lookup(cpu, pc, cs_base, flags, cf_mask); if (tb == NULL) { return NULL; } diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 16e4fe3ccd..ef96b312a1 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -245,6 +245,7 @@ static void cpu_exec_exit(CPUState *cpu) void cpu_exec_step_atomic(CPUState *cpu) { + CPUArchState *env = (CPUArchState *)cpu->env_ptr; TranslationBlock *tb; target_ulong cs_base, pc; uint32_t flags; @@ -258,7 +259,9 @@ void cpu_exec_step_atomic(CPUState *cpu) g_assert(!cpu->running); cpu->running = true; - tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); + cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); + tb = tb_lookup(cpu, pc, cs_base, flags, cf_mask); + if (tb == NULL) { mmap_lock(); tb = tb_gen_code(cpu, pc, cs_base, flags, cflags); @@ -418,11 +421,14 @@ static inline TranslationBlock *tb_find(CPUState *cpu, TranslationBlock *last_tb, int tb_exit, uint32_t cf_mask) { + CPUArchState *env = (CPUArchState *)cpu->env_ptr; TranslationBlock *tb; target_ulong cs_base, pc; uint32_t flags; - tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); + cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); + + tb = tb_lookup(cpu, pc, cs_base, flags, cf_mask); if (tb == NULL) { mmap_lock(); tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask); diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index d736f4ff55..05e3d52c2f 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -152,7 +152,9 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env) target_ulong cs_base, pc; uint32_t flags; - tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, curr_cflags()); + cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); + + tb = tb_lookup(cpu, pc, cs_base, flags, curr_cflags()); if (tb == NULL) { return tcg_code_gen_epilogue; }