From patchwork Tue May 4 05:52:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 430806 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp3491798jao; Mon, 3 May 2021 23:02:28 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxhWSLCQH5mb5yY7xNjkb/f4haJSSrMToU6MJNSm9GeuF+D6Fr0XhfqUvfNK9D6OLrlXf83 X-Received: by 2002:ab0:4757:: with SMTP id i23mr18945631uac.87.1620108147777; Mon, 03 May 2021 23:02:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620108147; cv=none; d=google.com; s=arc-20160816; b=eCJdhpUExaxShHxL9dX8TNHbXXLavNe0+Zf+zjUw56iYbbWwYycv3jImNae1lDZwN/ x2D0BfKmnQ6CEjY35ciOWSeJ0bZtXVJXUUFOCkCWE/IvMUbRgIfq9tpEHQ25K6DLygZw B9TVHlRKx3M17c+enzix1be65B6BUgmVd6pORqtbOZjQGT766Aqk6afLWB2nYFfM2Isp PM6USM+SytpYRuRU8MW+3dWsIzJx4Qu6p/kqdPhqd7ohTa1KBmZBYezD2In8pNcC0n6S W8lQ/rhEeEZCZ6zBKs8YTwSOuMyvd4XOhO/B8vD9C/miootDGoHt0cbiUnL4jCYdp7Mg X/dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=g56ZJv2rLl0TdfoNa2Rr4NI9ATwJQTuugbn8uua26ps=; b=YojzH8D23xyMlMxrO34yGiQkZQE1LYdZJnNj9nnaBhb2mr7mPO04dT7XWlLFCz72R1 5BzWVBkKwBp7eb12hQy7O2+SMCESxktEKl5/rac6WgQrvMNNgOvjlpap6/CDCUJkCEeE ahl4xkvxyPBMhS45J8pL4O4PXLTtNL25MhYaMLKscFDTXFGsqpIDoXLfuHCm2m9HtyTy bp0Ftky73IQhBBOFUBIsXs9hhAm/gkvLSeBEU4PM2hhLIrYpUkKvKvuqmXsurMmZBgfh pmT4m5af215Wb3NiLdPN7GaCqMjo41wlPP59jPzJuimtDX9cLuwYGXQi1f0vn4Db9oc9 z09w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=AnXHInv5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id u3si6357730vse.90.2021.05.03.23.02.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 May 2021 23:02:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=AnXHInv5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:33306 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldo8X-0003dU-0Z for patch@linaro.org; Tue, 04 May 2021 02:02:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60506) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldo02-0005Hc-IK; Tue, 04 May 2021 01:53:39 -0400 Received: from ozlabs.org ([203.11.71.1]:39851) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldnzz-0004kR-Cw; Tue, 04 May 2021 01:53:37 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FZ8CK4VJQz9sX3; Tue, 4 May 2021 15:53:17 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1620107597; bh=EOPu6ADeRLGhAyKKyY2SdVCCjqq706WI0Er+aWaZJ8o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AnXHInv5jo+304cUKO5rozSV2twH5FZNjMPDqQ4PAZRhJgM4jHLFwt1z0eNg/9RT2 fNu0Oj2NiodXUeoBknFdWAjIyrrOF7DHnKcQLiJTxC3KkWJX3jk1k/uIxZ6QVfD+V6 aPgE1SI5CLnU+ej1HgXGKMmtGt8a+TsF1/h3Uz78= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 15/46] target/ppc: Put LPCR[GTSE] in hflags Date: Tue, 4 May 2021 15:52:41 +1000 Message-Id: <20210504055312.306823-16-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210504055312.306823-1-david@gibson.dropbear.id.au> References: <20210504055312.306823-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Because this bit was not in hflags, the privilege check for tlb instructions was essentially random. Recompute hflags when storing to LPCR. Reviewed-by: David Gibson Signed-off-by: Richard Henderson Message-Id: <20210323184340.619757-7-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/cpu.h | 1 + target/ppc/helper_regs.c | 3 +++ target/ppc/mmu-hash64.c | 3 +++ target/ppc/translate.c | 2 +- 4 files changed, 8 insertions(+), 1 deletion(-) -- 2.31.1 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index d5f362506a..3c28ddb331 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -596,6 +596,7 @@ enum { HFLAGS_LE = 0, /* MSR_LE -- comes from elsewhere on 601 */ HFLAGS_HV = 1, /* computed from MSR_HV and other state */ HFLAGS_64 = 2, /* computed from MSR_CE and MSR_SF */ + HFLAGS_GTSE = 3, /* computed from SPR_LPCR[GTSE] */ HFLAGS_DR = 4, /* MSR_DR */ HFLAGS_IR = 5, /* MSR_IR */ HFLAGS_SPE = 6, /* from MSR_SPE if cpu has SPE; avoid overlap w/ MSR_VR */ diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index e345966b6b..f85bb14d1d 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -149,6 +149,9 @@ void hreg_compute_hflags(CPUPPCState *env) if ((ppc_flags & POWERPC_FLAG_TM) && (msr & (1ull << MSR_TM))) { hflags |= 1 << HFLAGS_TM; } + if (env->spr[SPR_LPCR] & LPCR_GTSE) { + hflags |= 1 << HFLAGS_GTSE; + } #ifndef CONFIG_USER_ONLY if (!env->has_hv_mode || (msr & (1ull << MSR_HV))) { diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index 0fabc10302..d517a99832 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -30,6 +30,7 @@ #include "exec/log.h" #include "hw/hw.h" #include "mmu-book3s-v3.h" +#include "helper_regs.h" /* #define DEBUG_SLB */ @@ -1125,6 +1126,8 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) CPUPPCState *env = &cpu->env; env->spr[SPR_LPCR] = val & pcc->lpcr_mask; + /* The gtse bit affects hflags */ + hreg_compute_hflags(env); } void helper_store_lpcr(CPUPPCState *env, target_ulong val) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d48c554290..5e629291d3 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7908,7 +7908,7 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->altivec_enabled = (hflags >> HFLAGS_VR) & 1; ctx->vsx_enabled = (hflags >> HFLAGS_VSX) & 1; ctx->tm_enabled = (hflags >> HFLAGS_TM) & 1; - ctx->gtse = !!(env->spr[SPR_LPCR] & LPCR_GTSE); + ctx->gtse = (hflags >> HFLAGS_GTSE) & 1; ctx->singlestep_enabled = 0; if ((hflags >> HFLAGS_SE) & 1) {