From patchwork Fri Oct 15 04:10:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 515845 Delivered-To: patch@linaro.org Received: by 2002:ac0:da11:0:0:0:0:0 with SMTP id d17csp156533imi; Thu, 14 Oct 2021 21:57:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwJ2yfqNAJ2phTTMXErdVjJd1OcOgOsCR6IiKDIn4OYXJwbvLnWaKbRG83x5PiCe3h0N2AF X-Received: by 2002:a05:6e02:102d:: with SMTP id o13mr2361287ilj.239.1634273870404; Thu, 14 Oct 2021 21:57:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634273870; cv=none; d=google.com; s=arc-20160816; b=Ry2D/3RcVDIut+cKBHfw+hNyjAdAEPJJEv+adx6MklpLAFYG/9yfijyaSimEphI1wO ckXBfHJz9In81KGt8duFysE1JwHJgW2KH8w2UKMFVriXvHUyrxFgyAvCokWCrRflmoxO gKYgm6CwQpiokytDjcoXCYdWi6CdYdE11kEuUmYx3LQphl5KQrWUr1n8pzEszCt9gU84 QZuBz29YbAx3/s2wPRcQFH7+AjqLmWkH4p4uzcXVi9Mdvy3liUd7nJ8DMsVYeN7TV+R8 YNcDvj18uhFiFIyObsezTLyroxVE/pFMxkTzfNClxoJ3TgKQ/YKIRG/8d81h1Xssp/kn zFUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=fVhlPoABQmS8wc89+ovGDAnkicIV2MZx6WAeJyRD9lM=; b=dx1KT4wsxbgpH1rkeRIVtPk652Laxh68aYNq9ZQKF0M3fOohU2HJoDGmjd9/JZZKee Vx5Ue/OEXvRFfBCOls/PPO//DgWQX8moB8Ek78USRMrWjEqSZOjdt/F/kI2lZuGWL4VX 90LreUV9edIkyR7haOe9JoOrG031cUR4fNWv2Vim5ISuxD6vHmR2BNcZfP2M3r+C3SKA zz4QaspWb5JOtWSV217uqGf5orG9YoXGWJ+X4IgI/zy8/rd4olPU5p9xmR5wh9CghtNk 5uy9hkaa+lj64Cmb/d6irpNwF1oDWqUgpKsSIRGSzZwv0KpcWsjGfynMAK5iRGm5Aiki a1Dw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=qMqrOYwm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f13si5772147iol.1.2021.10.14.21.57.50 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Oct 2021 21:57:50 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=qMqrOYwm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:51524 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mbFHx-000292-Hn for patch@linaro.org; Fri, 15 Oct 2021 00:57:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39674) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mbEcF-0006uo-F0 for qemu-devel@nongnu.org; Fri, 15 Oct 2021 00:14:45 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]:36422) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mbEcC-0002vY-L1 for qemu-devel@nongnu.org; Fri, 15 Oct 2021 00:14:43 -0400 Received: by mail-pj1-x102e.google.com with SMTP id qe4-20020a17090b4f8400b0019f663cfcd1so8463604pjb.1 for ; Thu, 14 Oct 2021 21:14:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fVhlPoABQmS8wc89+ovGDAnkicIV2MZx6WAeJyRD9lM=; b=qMqrOYwmtt+X1d0REGIMNZhO8FyCFOvBnfzL6sGzIsnCYp+PVN1RxFaSefSnooOMwY s0XyYPAyUrYx0ufnTgPRgEExTbn1oa8x3metExFrZEMM/2HOPL3FThXsTET6x80/8WxM +VfQ5goAHMARJYhTd17CadYKIaemfgdaRgG8/pAQUIYZyHov6wxaJ8qcUOkBV71EsyRg 3qB92KxHmjjS+KUE3RlNMJ24bRXJfYc9bvHR2dxTjIytJfHhVLG+oUhnNKEG3QtVBMc4 e8YaOAIzUyuNxMTiD2A70s4Lgaj/2/L/6dBXoufU+h5Jd8kq4yvUBGdcIyRbGpNyUXw6 Iefw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fVhlPoABQmS8wc89+ovGDAnkicIV2MZx6WAeJyRD9lM=; b=zyDFXpB/Gf+/y/NL9Go0OGa796C3yNXdIYxvLIz+SkvMbljoyLCxU0AjOrAK2i59Sa +p157bMUixFvloFEyz1TL8PuGPSYY+uMbk+IfDbSqXnt9K0Cu1XbKdSsHoNSkkUO9AuT 5OmvletN5Q4MjZ+No3z08Cy0EVf8S+6cI1E/pAKm9kNbT9Ets2l6wFL6oIfCe80NKj2P 9NWiQwXT/reCQDRnmfDragdTKNO3x5HpRqYX0tuyx8X2f+YWEFUJtIw/1JOdf7lGzjZn Z5MC5ComESfoxqHz1FBUh557qmTkkBMtZr5xiF4fgutQ2icTWkldBJr0p4uuGG3yZdsl AohQ== X-Gm-Message-State: AOAM530KlbhpBbl+sa77IX4itIczBZFjpVYv9k41w+/TaQIEwlqXSOmF SS9HcCxxhrAnlwXc40SeF8am/eLZkRp28w== X-Received: by 2002:a17:90a:4306:: with SMTP id q6mr11026428pjg.17.1634271279361; Thu, 14 Oct 2021 21:14:39 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id q8sm10236885pja.52.2021.10.14.21.14.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Oct 2021 21:14:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 56/67] target/sparc: Split out build_sfsr Date: Thu, 14 Oct 2021 21:10:42 -0700 Message-Id: <20211015041053.2769193-57-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211015041053.2769193-1-richard.henderson@linaro.org> References: <20211015041053.2769193-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , alex.bennee@linaro.org, laurent@vivier.eu, imp@bsdimp.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Mark Cave-Ayland Signed-off-by: Richard Henderson --- target/sparc/mmu_helper.c | 72 +++++++++++++++++++++++++-------------- 1 file changed, 46 insertions(+), 26 deletions(-) -- 2.25.1 diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 2ad47391d0..014601e701 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -502,16 +502,60 @@ static inline int ultrasparc_tag_match(SparcTLBEntry *tlb, return 0; } +static uint64_t build_sfsr(CPUSPARCState *env, int mmu_idx, int rw) +{ + uint64_t sfsr = SFSR_VALID_BIT; + + switch (mmu_idx) { + case MMU_PHYS_IDX: + sfsr |= SFSR_CT_NOTRANS; + break; + case MMU_USER_IDX: + case MMU_KERNEL_IDX: + sfsr |= SFSR_CT_PRIMARY; + break; + case MMU_USER_SECONDARY_IDX: + case MMU_KERNEL_SECONDARY_IDX: + sfsr |= SFSR_CT_SECONDARY; + break; + case MMU_NUCLEUS_IDX: + sfsr |= SFSR_CT_NUCLEUS; + break; + default: + g_assert_not_reached(); + } + + if (rw == 1) { + sfsr |= SFSR_WRITE_BIT; + } else if (rw == 4) { + sfsr |= SFSR_NF_BIT; + } + + if (env->pstate & PS_PRIV) { + sfsr |= SFSR_PR_BIT; + } + + if (env->dmmu.sfsr & SFSR_VALID_BIT) { /* Fault status register */ + sfsr |= SFSR_OW_BIT; /* overflow (not read before another fault) */ + } + + /* FIXME: ASI field in SFSR must be set */ + + return sfsr; +} + static int get_physical_address_data(CPUSPARCState *env, hwaddr *physical, int *prot, MemTxAttrs *attrs, target_ulong address, int rw, int mmu_idx) { CPUState *cs = env_cpu(env); unsigned int i; + uint64_t sfsr; uint64_t context; - uint64_t sfsr = 0; bool is_user = false; + sfsr = build_sfsr(env, mmu_idx, rw); + switch (mmu_idx) { case MMU_PHYS_IDX: g_assert_not_reached(); @@ -520,29 +564,18 @@ static int get_physical_address_data(CPUSPARCState *env, hwaddr *physical, /* fallthru */ case MMU_KERNEL_IDX: context = env->dmmu.mmu_primary_context & 0x1fff; - sfsr |= SFSR_CT_PRIMARY; break; case MMU_USER_SECONDARY_IDX: is_user = true; /* fallthru */ case MMU_KERNEL_SECONDARY_IDX: context = env->dmmu.mmu_secondary_context & 0x1fff; - sfsr |= SFSR_CT_SECONDARY; break; - case MMU_NUCLEUS_IDX: - sfsr |= SFSR_CT_NUCLEUS; - /* FALLTHRU */ default: context = 0; break; } - if (rw == 1) { - sfsr |= SFSR_WRITE_BIT; - } else if (rw == 4) { - sfsr |= SFSR_NF_BIT; - } - for (i = 0; i < 64; i++) { /* ctx match, vaddr match, valid? */ if (ultrasparc_tag_match(&env->dtlb[i], address, context, physical)) { @@ -592,22 +625,9 @@ static int get_physical_address_data(CPUSPARCState *env, hwaddr *physical, return 0; } - if (env->dmmu.sfsr & SFSR_VALID_BIT) { /* Fault status register */ - sfsr |= SFSR_OW_BIT; /* overflow (not read before - another fault) */ - } - - if (env->pstate & PS_PRIV) { - sfsr |= SFSR_PR_BIT; - } - - /* FIXME: ASI field in SFSR must be set */ - env->dmmu.sfsr = sfsr | SFSR_VALID_BIT; - + env->dmmu.sfsr = sfsr; env->dmmu.sfar = address; /* Fault address register */ - env->dmmu.tag_access = (address & ~0x1fffULL) | context; - return 1; } }