From patchwork Wed Nov 3 14:08:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516757 Delivered-To: patch@linaro.org Received: by 2002:ad5:5208:0:0:0:0:0 with SMTP id p8csp713990iml; Wed, 3 Nov 2021 07:26:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw/Hz3lxZ6tNcTHi+kGe9/aWL8T/rQ2fQ6iv7/v3gPxuVphIqobEj8snnZBC3Te1F1h9vFp X-Received: by 2002:a05:6830:3484:: with SMTP id c4mr16221894otu.254.1635949611809; Wed, 03 Nov 2021 07:26:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1635949611; cv=none; d=google.com; s=arc-20160816; b=zPsvPJ6DT1FN27z4eeNcDQrwDNfwhJQlJzHY0Q4KPM+CE0mm4Z5yjJc6Q+FsUDuV8T FZFSzhLay9LiQR19sBkhcjv1wuye1r0R8TCULuSrsFaqmHgpWXmq8rrd7wsh4Sf+Ldn8 eCUpcsQQ0AR+FmwLiNp0ArtbGJsZ/LHNz/tPC8syCX6013M8MfhJ6kWDWRrRg4azsPA7 HITrfom5CztlyWVniQRd2OzaFpDw9hIdz5fB75m5SpWb/YoyGnYKC7A2nx/fflqwizOy ZDZZml3y7jLIje4qh0cuiGVTEh758e9CB6oWe39cJhlqHXOpJTOw5tYsSlDtQEJpMjyR bI6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=sVhhElrpe+4XPKy6R1NWowFrVYM3GvIonkol7qAjv2A=; b=ALMtkBai+1X/s57OC3qXwfy+HnJjBN6LoecXXtjgKsVKXI8xc2XUBy9eRORrbLpC3Y 15CQg3+/6vJupD24Pq0I8u4hznEVeayZ2X7kJhvY1M/5JwomWC9Qru6VZq5h422D1wg6 tmT21BKh+Wii46lDnct5KPzW2TGj8VGrzuKiBdPdUjFfiY/a6Cr7Eg7HeHnH8xfhKZ56 rLUdroViEnUJGJYC9kiMfRng8OuJFE2ZVLgLWqcg05pbl5tGbpIY3vJCVQaYB1dtX3li imdzmPxD+9HYLFxcOyHCzGBU8gl4ZuJQcOzHL7aQDGrGRTbCMWsOP1R3cNA7qMFDVmYO MeBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=OxeTtimA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id bk40si4428047oib.163.2021.11.03.07.26.51 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Nov 2021 07:26:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=OxeTtimA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:51250 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1miHE3-00080g-7I for patch@linaro.org; Wed, 03 Nov 2021 10:26:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47794) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1miGwn-0002Qk-Cq for qemu-devel@nongnu.org; Wed, 03 Nov 2021 10:09:01 -0400 Received: from mail-qt1-x830.google.com ([2607:f8b0:4864:20::830]:44027) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1miGwl-00055T-9q for qemu-devel@nongnu.org; Wed, 03 Nov 2021 10:09:01 -0400 Received: by mail-qt1-x830.google.com with SMTP id 8so903323qty.10 for ; Wed, 03 Nov 2021 07:08:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sVhhElrpe+4XPKy6R1NWowFrVYM3GvIonkol7qAjv2A=; b=OxeTtimAvRbEY5x5nVTZeQcshfaXUGeMM1uV7e3uohIn9pMTXYFD9I5J173kx2cKak X+jnOfGm0YPuZ0DNmFBMOJvMkrPVihK0BTemnihktfOxuJ5LbuF1j4359zxyowsSHS9E 60aUS4ZH2Gq9KKWPS4AI7a06VYAsXnV2FU3Iz3ibLe4alGk3T7O3PvKYzmOq3R7eLxzT MrH6Kis7dEYjb6DoBa3pwMT3JSDWO/uBflYxn7aZ1K6qBDQljCHdb+IuE+OGurzOoV1K yospk1O1zK6ErY2Lxju+WRQ1RvL9svV93jJghwYAjLW45j3uQ7uCpn6PnvmHOFJfUja0 mZfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sVhhElrpe+4XPKy6R1NWowFrVYM3GvIonkol7qAjv2A=; b=ZJJ8RqslKRQQSbQsXJQ0oSs0lOZvQY8GNa7ZJMWGQmIIwxGgi6RuJQe2TwghDhYkC3 hboDIY4CDqEhket/ashdqJBFdTFLBrs/fkAVSqmnHf+3O5tBR7fxXWDepGrXaFqf02G6 Iu8Q5pryDqmK7OHhYU8Rro6CdR/UhPj/BnxrEKOPUX81omXM+mcVpoZjXpllYFNHKCQh QoB3zAr3UpYLl7HJ1BtDp1T2GbyzdccTgfCTSAcufYAGsADttkAK1uSGQTKhPgA2uu4d xf478N+VmQQsAAwiaNPRXPyVGr8oXvMlfLlxeOoiW8g/6uRjgKwSamAR5NdSR965vGwZ C7vg== X-Gm-Message-State: AOAM531qGbCjl0KDRBwrU4b5vrfhS0B1DVMdr94ZYSQeZJkfSpTuxl1i MH0qTWg/MiNFNewPtcp7nh8JkQZ8zXvb0A== X-Received: by 2002:a05:622a:1010:: with SMTP id d16mr47949927qte.70.1635948538425; Wed, 03 Nov 2021 07:08:58 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-57.nyc.biz.rr.com. [172.254.253.57]) by smtp.gmail.com with ESMTPSA id z5sm1669377qtw.71.2021.11.03.07.08.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Nov 2021 07:08:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 14/23] linux-user/mips: Use force_sig_fault Date: Wed, 3 Nov 2021 10:08:38 -0400 Message-Id: <20211103140847.454070-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211103140847.454070-1-richard.henderson@linaro.org> References: <20211103140847.454070-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::830; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x830.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Use the new function instead of setting up a target_siginfo_t and calling queue_signal. Fill in the missing PC for SIGTRAP and SIGFPE; use force_sig (SI_KERNEL) for EXCP_DSPDIS. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/mips/cpu_loop.c | 38 +++++++++++++------------------------- 1 file changed, 13 insertions(+), 25 deletions(-) -- 2.25.1 diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index 7317194cc3..034b31f853 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -64,8 +64,7 @@ static void do_tr_or_bp(CPUMIPSState *env, unsigned int code, bool trap) void cpu_loop(CPUMIPSState *env) { CPUState *cs = env_cpu(env); - target_siginfo_t info; - int trapnr; + int trapnr, si_code; abi_long ret; # ifdef TARGET_ABI_MIPSO32 unsigned int syscall_num; @@ -156,43 +155,32 @@ done_syscall: break; case EXCP_CpU: case EXCP_RI: - info.si_signo = TARGET_SIGILL; - info.si_errno = 0; - info.si_code = 0; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + case EXCP_DSPDIS: + force_sig(TARGET_SIGILL); break; case EXCP_INTERRUPT: /* just indicate that signals should be handled asap */ break; case EXCP_DEBUG: - info.si_signo = TARGET_SIGTRAP; - info.si_errno = 0; - info.si_code = TARGET_TRAP_BRKPT; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; - case EXCP_DSPDIS: - info.si_signo = TARGET_SIGILL; - info.si_errno = 0; - info.si_code = TARGET_ILL_ILLOPC; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, + env->active_tc.PC); break; case EXCP_FPE: - info.si_signo = TARGET_SIGFPE; - info.si_errno = 0; - info.si_code = TARGET_FPE_FLTUNK; + si_code = TARGET_FPE_FLTUNK; if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_INVALID) { - info.si_code = TARGET_FPE_FLTINV; + si_code = TARGET_FPE_FLTINV; } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_DIV0) { - info.si_code = TARGET_FPE_FLTDIV; + si_code = TARGET_FPE_FLTDIV; } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_OVERFLOW) { - info.si_code = TARGET_FPE_FLTOVF; + si_code = TARGET_FPE_FLTOVF; } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_UNDERFLOW) { - info.si_code = TARGET_FPE_FLTUND; + si_code = TARGET_FPE_FLTUND; } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_INEXACT) { - info.si_code = TARGET_FPE_FLTRES; + si_code = TARGET_FPE_FLTRES; } - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + force_sig_fault(TARGET_SIGFPE, si_code, env->active_tc.PC); break; + /* The code below was inspired by the MIPS Linux kernel trap * handling code in arch/mips/kernel/traps.c. */