From patchwork Fri Apr 22 10:04:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 564799 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp348419map; Fri, 22 Apr 2022 03:45:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx0ZBhDYeJfdJ0Rh8o4smzvAjgnxN1IB+opiEB+ukwsv7xYkAxvc6Rysah4BlrQHpzwMjY9 X-Received: by 2002:a05:6214:2b09:b0:446:7c3a:92c0 with SMTP id jx9-20020a0562142b0900b004467c3a92c0mr2726156qvb.87.1650624315967; Fri, 22 Apr 2022 03:45:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1650624315; cv=none; d=google.com; s=arc-20160816; b=g/vjTImBpBc6weqG7Sug4qY4hyxU3kDCK7Eh73HfZ92Y30exkV9bjkR/o0NacM3qlN Mrx3Y2VzE4D2fKbCKcHN24E+nRbVIFbV4BxjMqBcw0hwoxLYMKjG5dvO0QAhaKc59hqZ MjhXgiOVkf1kqYHYzpTpNLy8TloJKUJ2NcU0TjRNFoGKBPkqQzSHl2w9ymcFiKEr0rZ3 FiRtusWm5Cfe53DLnAw3RnUtKGh62/+bXIpNgYSfE19MB+LUIB1OT+SXdsrAP7VEzq3D hQ+0X5Kl8oYFuZx8ThkOFdegzxg9NRPepqmJqvfZki8xBsmElcze7wOplPpdrIuzGH+x zUNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=c/OOC42uprblXlXB5QXrfAyFGH41UtdvfiTd3g5mfb4=; b=uOwXgmZIxLFH5mnCLOA+FA56iJ5G4c9xLaIuqJ63NeIMAoDnTcBDG7gAhhRrp5aYTt UW4pEfwy653zOpsFUgpkq/2Ln56zZi5Qa5FfByoUcv/B6Nn/ShwS0meP7UZBZVmM4OD7 GWmw0ripG4zp+oevDW+YjGb+G+6Ga95ltPpSgrJO0vrL280e7cNU8OEyuXMs4PpucDoa 25zh6ZYUYM5iYcO5FJR82JCg/ldxjxxlnUsdrQKf4MY919N3/IisggQIVqcfJm/IX8JI qpBqlEkhrbvd5pwbddwZqzMdOEAvvGddh6xmKNfgO48CqXgRZ378ahRe6PBSKqtloMxV PMVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IQHtHXqf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id y1-20020a05620a44c100b0067e4be23858si2331461qkp.157.2022.04.22.03.45.15 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Apr 2022 03:45:15 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IQHtHXqf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:58894 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqmp-0007Jy-Du for patch@linaro.org; Fri, 22 Apr 2022 06:45:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59006) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA9-00059F-JV for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:17 -0400 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]:34690) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqA7-0002t5-RY for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:17 -0400 Received: by mail-wm1-x32f.google.com with SMTP id ay36-20020a05600c1e2400b0038ebc885115so4692208wmb.1 for ; Fri, 22 Apr 2022 03:05:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=c/OOC42uprblXlXB5QXrfAyFGH41UtdvfiTd3g5mfb4=; b=IQHtHXqfQefIJl5DmILOuHO6p/n5v/818cNo7tD+aOep1QMLWOvHR3fWSD74NkdjQh vQXLdP2qXQtEcKuHx+7OQy1acFQwKsz5FPIV6r0RS//4UHbcr5D84jwVtFgR3+hKq95w trK+eKrCY1KEShqFFsM/BEMHUsNtvsypTvu1tx8LFLGaiVDFzIk8LHs9aL8VVVdqIrIi ThQM4MzG9/7E3PJ3GfRDbFN6nQhrCZ2tTTVWu9fpOmCGWeCKIT0HJGTa1oSet+8VjOa5 V2mAplKIQztQBe9+fGJU0PQ6qUZrDpKvzVPdDDoAmX8c4S/b4DhEz3gt3SbgrwUNm33M 2jxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=c/OOC42uprblXlXB5QXrfAyFGH41UtdvfiTd3g5mfb4=; b=juHjZ6LALZDajwZEfrXMYFZfm5oRiU0J8f94VHVyvTrjONZ11oc0V6i3QciHx1JW8M +t0E6tEQgO426c9aphOs4x9P903vdTqpqzeTL+2+Rm52qjuxqgb3QtbuuiL6p2XGxzqC t8pT0xUEPnJn2vbWgBL7wLUJ3KmZLnOMiRyuoKbubf5I2NfSvaMSCTlCC9k6m9vgZSTq SS8hsm0bXkXe5N4kU6RNDIcgGy070Hoc23F6wYqeLZC1gUVmwYbaVS0v/R4ehIMl7cAa bQEYxxYtJc1dcW/vXFhOIltoYSmc/QPqbXq4cmfbCBeKf+2VoT/eOyRZo0wOksprBw2B iL7A== X-Gm-Message-State: AOAM533h/6yQXYiRaUXXJ+qJ1e+yclT3OAsuapEzdz8npYcSAQDKGabU Yh96jaYgAMMQMjZdfyegsmfMtfe/DymAkg== X-Received: by 2002:a05:600c:1c15:b0:392:8c46:4fd4 with SMTP id j21-20020a05600c1c1500b003928c464fd4mr12248177wms.205.1650621913597; Fri, 22 Apr 2022 03:05:13 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.12 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:13 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 42/61] target/arm: Update ISAR fields for ARMv8.8 Date: Fri, 22 Apr 2022 11:04:13 +0100 Message-Id: <20220422100432.2288247-43-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Update isar fields per ARM DDI0487 H.a. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Peter Maydell --- target/arm/cpu.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index cb5359a7470..564821eeded 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1934,6 +1934,7 @@ FIELD(ID_MMFR4, CCIDX, 24, 4) FIELD(ID_MMFR4, EVT, 28, 4) FIELD(ID_MMFR5, ETS, 0, 4) +FIELD(ID_MMFR5, NTLBPA, 4, 4) FIELD(ID_PFR0, STATE0, 0, 4) FIELD(ID_PFR0, STATE1, 4, 4) @@ -1986,6 +1987,16 @@ FIELD(ID_AA64ISAR1, SPECRES, 40, 4) FIELD(ID_AA64ISAR1, BF16, 44, 4) FIELD(ID_AA64ISAR1, DGH, 48, 4) FIELD(ID_AA64ISAR1, I8MM, 52, 4) +FIELD(ID_AA64ISAR1, XS, 56, 4) +FIELD(ID_AA64ISAR1, LS64, 60, 4) + +FIELD(ID_AA64ISAR2, WFXT, 0, 4) +FIELD(ID_AA64ISAR2, RPRES, 4, 4) +FIELD(ID_AA64ISAR2, GPA3, 8, 4) +FIELD(ID_AA64ISAR2, APA3, 12, 4) +FIELD(ID_AA64ISAR2, MOPS, 16, 4) +FIELD(ID_AA64ISAR2, BC, 20, 4) +FIELD(ID_AA64ISAR2, PAC_FRAC, 24, 4) FIELD(ID_AA64PFR0, EL0, 0, 4) FIELD(ID_AA64PFR0, EL1, 4, 4) @@ -2008,6 +2019,10 @@ FIELD(ID_AA64PFR1, SSBS, 4, 4) FIELD(ID_AA64PFR1, MTE, 8, 4) FIELD(ID_AA64PFR1, RAS_FRAC, 12, 4) FIELD(ID_AA64PFR1, MPAM_FRAC, 16, 4) +FIELD(ID_AA64PFR1, SME, 24, 4) +FIELD(ID_AA64PFR1, RNDR_TRAP, 28, 4) +FIELD(ID_AA64PFR1, CSV2_FRAC, 32, 4) +FIELD(ID_AA64PFR1, NMI, 36, 4) FIELD(ID_AA64MMFR0, PARANGE, 0, 4) FIELD(ID_AA64MMFR0, ASIDBITS, 4, 4) @@ -2034,6 +2049,11 @@ FIELD(ID_AA64MMFR1, SPECSEI, 24, 4) FIELD(ID_AA64MMFR1, XNX, 28, 4) FIELD(ID_AA64MMFR1, TWED, 32, 4) FIELD(ID_AA64MMFR1, ETS, 36, 4) +FIELD(ID_AA64MMFR1, HCX, 40, 4) +FIELD(ID_AA64MMFR1, AFP, 44, 4) +FIELD(ID_AA64MMFR1, NTLBPA, 48, 4) +FIELD(ID_AA64MMFR1, TIDCP1, 52, 4) +FIELD(ID_AA64MMFR1, CMOW, 56, 4) FIELD(ID_AA64MMFR2, CNP, 0, 4) FIELD(ID_AA64MMFR2, UAO, 4, 4) @@ -2060,7 +2080,10 @@ FIELD(ID_AA64DFR0, CTX_CMPS, 28, 4) FIELD(ID_AA64DFR0, PMSVER, 32, 4) FIELD(ID_AA64DFR0, DOUBLELOCK, 36, 4) FIELD(ID_AA64DFR0, TRACEFILT, 40, 4) +FIELD(ID_AA64DFR0, TRACEBUFFER, 44, 4) FIELD(ID_AA64DFR0, MTPMU, 48, 4) +FIELD(ID_AA64DFR0, BRBE, 52, 4) +FIELD(ID_AA64DFR0, HPMN0, 60, 4) FIELD(ID_AA64ZFR0, SVEVER, 0, 4) FIELD(ID_AA64ZFR0, AES, 4, 4) @@ -2082,6 +2105,7 @@ FIELD(ID_DFR0, PERFMON, 24, 4) FIELD(ID_DFR0, TRACEFILT, 28, 4) FIELD(ID_DFR1, MTPMU, 0, 4) +FIELD(ID_DFR1, HPMN0, 4, 4) FIELD(DBGDIDR, SE_IMP, 12, 1) FIELD(DBGDIDR, NSUHD_IMP, 14, 1)