From patchwork Wed Apr 27 11:15:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 566753 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp4399310map; Wed, 27 Apr 2022 04:18:56 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyIVokLkAgMGN0j/yAXFdDdT66jui+rD1jiikzYMaPzsK7VmuJFEEBBCLjUTNYUElx9fdUQ X-Received: by 2002:a37:5346:0:b0:69c:679d:9d51 with SMTP id h67-20020a375346000000b0069c679d9d51mr16014101qkb.189.1651058336267; Wed, 27 Apr 2022 04:18:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1651058336; cv=none; d=google.com; s=arc-20160816; b=uoPkESlQOCUDuMvimU0p4Qj5Vbv1jfYawV3zrekCt13ul3kozUaUhGD29QCdZM7Ygk mND0DN6slc2BW/Ft9vKrO341H3Wv2MXAGN+nzhRkynBH0esU1R5mW7H5uFhDPfsxnGki djHltqEHigqOIcnjpHQ/Mm6aFvE+F5NxvHv7UyEoNVOFw+pfj4kzEPfOyzGZiVDQeYro 8qSG4RtmxIyeKBQDvYI1+1E1N/ERBQQMiL42Nnf519PusvAqkLfdTd1ZnteXEVSpBQU/ epG+hAMcelKY7fT6y44qYUWlj7fy8bdcZoBpdo5+9ASy1RGXh0uoT2OWbhpN9RBez1JY mnXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:to:from:dkim-signature; bh=BXWQKQjiGW6dpjyjLkpuXMnH49wsJoaisgXWPQdjm7k=; b=rchY6QMX9s2hg7rZpudz2y0i8g9Be5dp8CI9PXWgr8XFgL3HJzxxe/jqK9lo+0UM/V UcY+LpjGZqb9jlQAQWaH73jOdcMyYGmYFZbyfaotCqAo6mG0dkvhjskPR+dT5e4vjVl9 ODyMMOaQHTnLECtEBt6XjmC8kht46B9bI+tfZwqCrdSq/PphMKSsufRXjNxzJ+0uIkmq F5jeR3QONeR12aV49v1qcRhzlDOHXVJ25/0a3IUGobklkc1pDLNpW4T+OQdbMxwKbhAt Xp7vyz+nvXCwkJQw5IeZa6+Qg0mb5XIDpqtfvlQNmfjMOAGGyRlH+TtKCzV6zWJtFRnw +Qnw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JpgYCvw2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id j4-20020a05620a410400b00699aa123d41si356679qko.611.2022.04.27.04.18.56 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 27 Apr 2022 04:18:56 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JpgYCvw2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:53182 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1njfh9-0006Pq-SP for patch@linaro.org; Wed, 27 Apr 2022 07:18:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41348) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1njfg7-0006Mo-E3 for qemu-devel@nongnu.org; Wed, 27 Apr 2022 07:17:51 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:40504) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1njfg2-0007N4-ST for qemu-devel@nongnu.org; Wed, 27 Apr 2022 07:17:48 -0400 Received: by mail-wr1-x430.google.com with SMTP id e2so2007590wrh.7 for ; Wed, 27 Apr 2022 04:17:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=BXWQKQjiGW6dpjyjLkpuXMnH49wsJoaisgXWPQdjm7k=; b=JpgYCvw26S0gXkW5kga2CEi7PCpNtOVVJa7pRXCgFd/WkAVuuxjPq0ZZK3mnjqpwHR j/Ra2cfxUwrH4XUjxr0J6K3Dm7L1Cxe5vMi0/UXcPvUq2g0TGKJl/r0PmLPQX9AffKde Y1gFLAjYNLHf502VpcDJfB6LvFtBh4fZlaBxX9Z0Rl1LxIJfDbz9nlSzZO759W3BkvFU oZCca2onGod5lXfDo8Tk0dYyE7DzrkCDxoXAu6TJyCKBg8R0yK/tlaBFvgDh6COkJkuL 6Frnmk2Lj56LGpsiYo+q9v4j5V1AAxGp+zDA9g0cWie8547L0f29RSoB66Cf1jyrDA4J b6Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=BXWQKQjiGW6dpjyjLkpuXMnH49wsJoaisgXWPQdjm7k=; b=NNwnNQa12m3NVQ8dJxrfCdb8BWmq2AxsQqzyxTMB5F0mYz0KdDxig0ZFxEiNynGw54 C3F/ibX1n3khvc80MvTXTBditQJpDHwUEGEZj/Z76kt9zE1gbIk5PEXdhhBCb8ykHJoy Tnszmthm1/hERY8aC7BHO7jV8l26+QrlonoTHuI3XnsG8uTOnKXb/8E4Dctl2cFUto1q uS0OEiY6OFuHVWg22mQYi0d/n2Hwek658t5JfIrSDBKbDh1km538vr3XtJwf1VtRGVhq zZRrBHCH4MzEi9W4df2FIT2SjCE+S44P1hBDrhxWwPkYLBWMnX0CTqROaAODYbCjhfBB CV2A== X-Gm-Message-State: AOAM530cmLKdbRPjmkMGEWQjIy0sIOoGMHwYfbGzVVjs0tpo+Pn6uPak WL1BPnDsS1zt/f79Tt1HCxHMUg== X-Received: by 2002:a5d:64cb:0:b0:20a:903f:5d70 with SMTP id f11-20020a5d64cb000000b0020a903f5d70mr21782997wri.138.1651058265114; Wed, 27 Apr 2022 04:17:45 -0700 (PDT) Received: from localhost.localdomain (cpc92880-cmbg19-2-0-cust679.5-4.cable.virginm.net. [82.27.106.168]) by smtp.gmail.com with ESMTPSA id d17-20020adfa351000000b0020adbfb586fsm8313104wrb.117.2022.04.27.04.17.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 04:17:44 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH 1/2] hw/arm/smmuv3: Cache event fault record Date: Wed, 27 Apr 2022 12:15:43 +0100 Message-Id: <20220427111543.124620-1-jean-philippe@linaro.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=jean-philippe@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, Jean-Philippe Brucker Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The Record bit in the Context Descriptor tells the SMMU to report fault events to the event queue. Since we don't cache the Record bit at the moment, access faults from a cached Context Descriptor are never reported. Store the Record bit in the cached SMMUTransCfg. Fixes: 9bde7f0674fe ("hw/arm/smmuv3: Implement translate callback") Signed-off-by: Jean-Philippe Brucker Reviewed-by: Richard Henderson Reviewed-by: Eric Auger --- hw/arm/smmuv3-internal.h | 1 - include/hw/arm/smmu-common.h | 1 + hw/arm/smmuv3.c | 14 +++++++------- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index d1885ae3f2..6de52bbf4d 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -387,7 +387,6 @@ typedef struct SMMUEventInfo { SMMUEventType type; uint32_t sid; bool recorded; - bool record_trans_faults; bool inval_ste_allowed; union { struct { diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index 706be3c6d0..21e62342e9 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -71,6 +71,7 @@ typedef struct SMMUTransCfg { bool disabled; /* smmu is disabled */ bool bypassed; /* translation is bypassed */ bool aborted; /* translation is aborted */ + bool record_faults; /* record fault events */ uint64_t ttb; /* TT base address */ uint8_t oas; /* output address width */ uint8_t tbi; /* Top Byte Ignore */ diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 707eb430c2..8b1d8103dc 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -527,7 +527,7 @@ static int decode_cd(SMMUTransCfg *cfg, CD *cd, SMMUEventInfo *event) trace_smmuv3_decode_cd_tt(i, tt->tsz, tt->ttb, tt->granule_sz, tt->had); } - event->record_trans_faults = CD_R(cd); + cfg->record_faults = CD_R(cd); return 0; @@ -680,7 +680,7 @@ static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr, tt = select_tt(cfg, addr); if (!tt) { - if (event.record_trans_faults) { + if (cfg->record_faults) { event.type = SMMU_EVT_F_TRANSLATION; event.u.f_translation.addr = addr; event.u.f_translation.rnw = flag & 0x1; @@ -696,7 +696,7 @@ static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr, if (cached_entry) { if ((flag & IOMMU_WO) && !(cached_entry->entry.perm & IOMMU_WO)) { status = SMMU_TRANS_ERROR; - if (event.record_trans_faults) { + if (cfg->record_faults) { event.type = SMMU_EVT_F_PERMISSION; event.u.f_permission.addr = addr; event.u.f_permission.rnw = flag & 0x1; @@ -720,28 +720,28 @@ static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr, event.u.f_walk_eabt.addr2 = ptw_info.addr; break; case SMMU_PTW_ERR_TRANSLATION: - if (event.record_trans_faults) { + if (cfg->record_faults) { event.type = SMMU_EVT_F_TRANSLATION; event.u.f_translation.addr = addr; event.u.f_translation.rnw = flag & 0x1; } break; case SMMU_PTW_ERR_ADDR_SIZE: - if (event.record_trans_faults) { + if (cfg->record_faults) { event.type = SMMU_EVT_F_ADDR_SIZE; event.u.f_addr_size.addr = addr; event.u.f_addr_size.rnw = flag & 0x1; } break; case SMMU_PTW_ERR_ACCESS: - if (event.record_trans_faults) { + if (cfg->record_faults) { event.type = SMMU_EVT_F_ACCESS; event.u.f_access.addr = addr; event.u.f_access.rnw = flag & 0x1; } break; case SMMU_PTW_ERR_PERMISSION: - if (event.record_trans_faults) { + if (cfg->record_faults) { event.type = SMMU_EVT_F_PERMISSION; event.u.f_permission.addr = addr; event.u.f_permission.rnw = flag & 0x1;