From patchwork Thu May 5 09:11:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 569945 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:66c4:0:0:0:0 with SMTP id x4csp627939mal; Thu, 5 May 2022 03:27:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx0dJQUwi4PZ2WA/O+d3ZVcRxl4xgii22SGf8DHs7uE7d7Nn/33wsypRYeN3X6jQIKKg/p9 X-Received: by 2002:a05:620a:1a9a:b0:69c:4a99:ea50 with SMTP id bl26-20020a05620a1a9a00b0069c4a99ea50mr18771893qkb.632.1651746460310; Thu, 05 May 2022 03:27:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1651746460; cv=none; d=google.com; s=arc-20160816; b=awNxsMPfOvCOeHoEx0ma9qpFYo3ZdAWWAEuAnr+Kt8gmXDCiSF5M8CgWy2VLuAzWg8 bl7Rz9Yh1ux+d+5DvBO2RZ2zu9iwzquoIDqwTZv1GcAl8yyfyl22O4rZRiw+j7R+VRM3 oK7XIV8qL3yhNJVJpTkmg84Ycf97cAGKpHGaaVXtVS7fbV/aA4Ne0hNCgZSvb7VJyShd v6hiwNwgUbHL103X8vieldn7lOY3HGN+eudsJD1i/bImFaYHjI3tmn/REOpJ5XUGIbZd CcACvOUiCwhDvrCTGEuoifbqcVP6nFkR3rsS/jq3jN+gtY9cWvGayN9LoZm5SXIs720F VQ2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=SjjyaPs6OMir0qoBbc7kdJL63HtWlrJst0Uy7ZOsTsk=; b=Q/HRpRWo7luteQ/tpmsU3tq1CH5N4HK1MvNZbiaAl5FPrP2y8o+NOTb5Vbl5NJ7bAt 32vzdzrrQZ6sB9QirlY/JS/htj3HlZ1OtU8VzbTySMBJtJ8En8dG04B5zv8B2X6Uq3t/ 5JgBVpAPBQxi3bfJC/tDOMJ8XFvx2YijEmCmGV622uy5i0tq3YHKWCIqclO54Z/O0oA4 GXrTsbP0X32s1k8cCOm+YhKbT5k9CejdLN0j5nhbJwyWRK5zrIkL048WMKNv7iOW/X0F OoepWIJ7nna6hXe8ccHffC6ZMZRzsoSPJI3q91wH4eBD8tVNfFCmdhwfFycABjomdjKU nsbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XhGUE1qi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id w11-20020a05620a424b00b0069c2005dbf4si611932qko.377.2022.05.05.03.27.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 05 May 2022 03:27:40 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XhGUE1qi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:32922 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nmYhv-0006IG-TG for patch@linaro.org; Thu, 05 May 2022 06:27:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38664) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nmXWn-0005CB-CJ for qemu-devel@nongnu.org; Thu, 05 May 2022 05:12:05 -0400 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]:39690) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nmXWl-0003C1-6Q for qemu-devel@nongnu.org; Thu, 05 May 2022 05:12:04 -0400 Received: by mail-wr1-x436.google.com with SMTP id d5so5217645wrb.6 for ; Thu, 05 May 2022 02:12:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=SjjyaPs6OMir0qoBbc7kdJL63HtWlrJst0Uy7ZOsTsk=; b=XhGUE1qiNtk50sHhwvlqPT2YlWr7g7Szn1wqBbaZpDaDgFTyrj7nGnBOzf3Nf30EkO ADjVq22yTkYcg/25QBUd5CWhiutBFxK1aY5gi2LnLJoQHyNmMn0VXXtNNSlkHjeb4iiw vY+JuQXWFlrT0E6WFDqktkHiBh12EOO2ZFkthN9bp+wsnYoRlIwxaX1mS4yef7u4WM77 6I0vXZljzs+HZ6IwTsKhYbp92Sy8kbYHnWbTDKAGHCru2Qzj78GjmmKNRv/JgxKPQFvV kJhp5NXdacbnyDwATvhttYgKQFMO95RpAb6mpq+QGygCquPmZOVYEsSqw5uugkPw3gKC XEJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SjjyaPs6OMir0qoBbc7kdJL63HtWlrJst0Uy7ZOsTsk=; b=EgxseGn4qYmyDYyvO654ptGAdGbe/6VzOyNLviYmV4so2tKYbz4qdAMnCrbXR+TJg1 vHRrn0Qr8QUXd7/hE1kvN3GErqQOQD5bN/SyZ1YafYeySq4IXz/3Ah0Yx6QqLAXpgB9W cnO8frUuAkFhMa1qHv7n9htiWAWu0MGB0xrelzjccHIABhury1+wiPlV7GXfZld9dWCg HrBeSRg8F3ErxE0TAJUFFVMzmcMJ0A1uTFMpfoNiwiJ19hONK5ictxXPUnfMB5P/HbRk Xy16KU7tBVV2ZK1ktX4GCduoE2p+NwrBN/s0gnxMnOIpM4qkfUSAs2UA9jGa+3eob3oh 7uBw== X-Gm-Message-State: AOAM531jJ8P9iIf/WpiKhFJVGBOSbEQKElXtGbWZXriJEkWr/E21KwzH bvy7gXrppAGOqxc/XSpNfV1uDOD9Z6e/cA== X-Received: by 2002:adf:d1e7:0:b0:20c:61a7:de2a with SMTP id g7-20020adfd1e7000000b0020c61a7de2amr14896318wrd.332.1651741922299; Thu, 05 May 2022 02:12:02 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id j14-20020adfe50e000000b0020c6a524fd5sm841612wrm.99.2022.05.05.02.12.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 May 2022 02:12:01 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 13/23] target/arm: Merge allocation of the cpreg and its name Date: Thu, 5 May 2022 10:11:37 +0100 Message-Id: <20220505091147.2657652-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220505091147.2657652-1-peter.maydell@linaro.org> References: <20220505091147.2657652-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Simplify freeing cp_regs hash table entries by using a single allocation for the entire value. This fixes a theoretical bug if we were to ever free the entire hash table, because we've been installing string literal constants into the cpreg structure in define_arm_vh_e2h_redirects_aliases. However, at present we only free entries created for AArch32 wildcard cpregs which get overwritten by more specific cpregs, so this bug is never exposed. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20220501055028.646596-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.c | 16 +--------------- target/arm/helper.c | 10 ++++++++-- 2 files changed, 9 insertions(+), 17 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 602c060fff7..01176b2569f 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1071,27 +1071,13 @@ uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz) return (Aff1 << ARM_AFF1_SHIFT) | Aff0; } -static void cpreg_hashtable_data_destroy(gpointer data) -{ - /* - * Destroy function for cpu->cp_regs hashtable data entries. - * We must free the name string because it was g_strdup()ed in - * add_cpreg_to_hashtable(). It's OK to cast away the 'const' - * from r->name because we know we definitely allocated it. - */ - ARMCPRegInfo *r = data; - - g_free((void *)r->name); - g_free(r); -} - static void arm_cpu_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); cpu_set_cpustate_pointers(cpu); cpu->cp_regs = g_hash_table_new_full(g_direct_hash, g_direct_equal, - NULL, cpreg_hashtable_data_destroy); + NULL, g_free); QLIST_INIT(&cpu->pre_el_change_hooks); QLIST_INIT(&cpu->el_change_hooks); diff --git a/target/arm/helper.c b/target/arm/helper.c index 2bc81dbc5ec..d92fd23445b 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8506,11 +8506,17 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r, * add a single reginfo struct to the hash table. */ uint32_t key; - ARMCPRegInfo *r2 = g_memdup(r, sizeof(ARMCPRegInfo)); + ARMCPRegInfo *r2; int is64 = (r->type & ARM_CP_64BIT) ? 1 : 0; int ns = (secstate & ARM_CP_SECSTATE_NS) ? 1 : 0; + size_t name_len; + + /* Combine cpreg and name into one allocation. */ + name_len = strlen(name) + 1; + r2 = g_malloc(sizeof(*r2) + name_len); + *r2 = *r; + r2->name = memcpy(r2 + 1, name, name_len); - r2->name = g_strdup(name); /* Reset the secure state to the specific incoming state. This is * necessary as the register may have been defined with both states. */