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([71.212.142.129]) by smtp.gmail.com with ESMTPSA id c16-20020a624e10000000b0050dc7628142sm7721788pfb.28.2022.05.23.13.47.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 May 2022 13:47:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH 07/18] target/arm: Hoist arm_current_el in arm_generate_debug_exceptions Date: Mon, 23 May 2022 13:47:31 -0700 Message-Id: <20220523204742.740932-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220523204742.740932-1-richard.henderson@linaro.org> References: <20220523204742.740932-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Read this value once in the main function, and pass it around between the subroutines. Signed-off-by: Richard Henderson --- target/arm/debug_helper.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c index 20a0e4261a..2bbf065b3a 100644 --- a/target/arm/debug_helper.c +++ b/target/arm/debug_helper.c @@ -13,9 +13,8 @@ /* See AArch64.GenerateDebugExceptionsFrom() in ARM ARM pseudocode */ -static bool aa64_generate_debug_exceptions(CPUARMState *env) +static bool aa64_generate_debug_exceptions(CPUARMState *env, int cur_el) { - int cur_el = arm_current_el(env); int debug_el; if (cur_el == 3) { @@ -43,18 +42,16 @@ static bool aa64_generate_debug_exceptions(CPUARMState *env) return debug_el > cur_el; } -static bool aa32_generate_debug_exceptions(CPUARMState *env) +static bool aa32_generate_debug_exceptions(CPUARMState *env, int cur_el) { - int el = arm_current_el(env); - - if (el == 0 && arm_el_is_aa64(env, 1)) { - return aa64_generate_debug_exceptions(env); + if (cur_el == 0 && arm_el_is_aa64(env, 1)) { + return aa64_generate_debug_exceptions(env, cur_el); } if (arm_is_secure(env)) { int spd; - if (el == 0 && (env->cp15.sder & 1)) { + if (cur_el == 0 && (env->cp15.sder & 1)) { /* * SDER.SUIDEN means debug exceptions from Secure EL0 * are always enabled. Otherwise they are controlled by @@ -82,7 +79,7 @@ static bool aa32_generate_debug_exceptions(CPUARMState *env) } } - return el != 2; + return cur_el != 2; } /* @@ -99,10 +96,12 @@ static bool aa32_generate_debug_exceptions(CPUARMState *env) */ bool arm_generate_debug_exceptions(CPUARMState *env) { + int cur_el = arm_current_el(env); + if (env->aarch64) { - return aa64_generate_debug_exceptions(env); + return aa64_generate_debug_exceptions(env, cur_el); } else { - return aa32_generate_debug_exceptions(env); + return aa32_generate_debug_exceptions(env, cur_el); } }