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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id y3-20020a17090a390300b001ef81bac701sm1782089pjb.42.2022.07.08.08.48.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 08:48:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [RISU PATCH v4 29/29] aarch64: Trivial SME test Date: Fri, 8 Jul 2022 21:17:00 +0530 Message-Id: <20220708154700.18682-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220708154700.18682-1-richard.henderson@linaro.org> References: <20220708154700.18682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- test_sme_aarch64.s | 55 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 test_sme_aarch64.s diff --git a/test_sme_aarch64.s b/test_sme_aarch64.s new file mode 100644 index 0000000..a5ef909 --- /dev/null +++ b/test_sme_aarch64.s @@ -0,0 +1,55 @@ + .arch_extension sme + + mov w0, #0 + mov w1, #0 + mov w2, #0 + mov w3, #0 + mov w4, #0 + mov w5, #0 + mov w6, #0 + mov w7, #0 + mov w8, #0 + mov w9, #0 + mov w10, #0 + mov w11, #0 + mov w12, #0 + mov w13, #0 + mov w14, #0 + mov w15, #0 + mov w16, #0 + mov w17, #0 + mov w18, #0 + mov w19, #0 + mov w20, #0 + mov w21, #0 + mov w22, #0 + mov w23, #0 + mov w24, #0 + mov w25, #0 + mov w26, #0 + mov w27, #0 + mov w28, #0 + mov w29, #0 + mov w30, #0 + + smstart + + ptrue p0.b + rdsvl x12, #1 + +0: subs w12, w12, #1 + lsl w13, w12, #4 + index z0.b, w13, #1 + mova za0h.b[w12, #0], p0/m, z0.b + b.ne 0b + + .inst 0x00005af0 /* compare */ + + rdsvl x12, #1 +0: subs w12, w12, #1 + lsl w13, w12, #4 + index z0.b, w13, #1 + mova za0v.b[w12, #0], p0/m, z0.b + b.ne 0b + + .inst 0x00005af1 /* exit */