Message ID | 20220922163536.1096175-27-peter.maydell@linaro.org |
---|---|
State | Accepted |
Commit | c140a69055bad798a335ea3c83aebceaca82bde0 |
Headers | show
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Series |
[PULL,01/39] hw/net/can: fix Xilinx ZynqMP CAN RX FIFO logic
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diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c index 208e3e0d798..82aa61fedcd 100644 --- a/hw/net/e1000e_core.c +++ b/hw/net/e1000e_core.c @@ -1622,15 +1622,16 @@ e1000e_rx_fix_l4_csum(E1000ECore *core, struct NetRxPkt *pkt) } } +/* Min. octets in an ethernet frame sans FCS */ +#define MIN_BUF_SIZE 60 + ssize_t e1000e_receive_iov(E1000ECore *core, const struct iovec *iov, int iovcnt) { static const int maximum_ethernet_hdr_len = (14 + 4); - /* Min. octets in an ethernet frame sans FCS */ - static const int min_buf_size = 60; uint32_t n = 0; - uint8_t min_buf[min_buf_size]; + uint8_t min_buf[MIN_BUF_SIZE]; struct iovec min_iov; uint8_t *filter_buf; size_t size, orig_size;