From patchwork Tue Oct 4 19:52:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 612300 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp395847pvb; Tue, 4 Oct 2022 12:55:07 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7qsKWvqb0jMLH+TRv9l/TQwIkrEi929JquSN9kif5ljmdqo5VYLJIpGyttPm+r8NPzPISF X-Received: by 2002:a05:622a:64a:b0:389:b7de:1890 with SMTP id a10-20020a05622a064a00b00389b7de1890mr2896549qtb.488.1664913307079; Tue, 04 Oct 2022 12:55:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664913307; cv=none; d=google.com; s=arc-20160816; b=im9Z5OExM4+9XB5FdAsa+nOjbSBw7VTzmFtHAP0gHWAi/3nQGQwMw30DVykn1AAWCb Lk3CT1pMCVvaFGtmo8CUk1QjFU3gWKGnKRxAnbIaO4dISS/sTii0CXUY9EE6EhvaiDmL So11J5QWTx7uvUnsqXzuaSnjgJqmZPKKQWE6tZSDhd0WODklLALHViXXr/69SrrtxXju IIbQyFVp4afwDhQTk1hMDkGYtTCzi8QMxnqcSShcbVsBWCqE3oKvbPZoU0Sp0dMgywgu WHTXl88vCa24Box8wW707+uLmen/c3qxAIM6nM4jWuKD/R1tzZVjwVzdThMy6cTQR557 jb7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=St5dCg8yC5zIkIV0jUFWp9UWjpefIW881mvaUfGPCfo=; b=Ktwt1KA177A1HIBV+SGY1p3vuvOcqtB/Y0BbKMtEBfLwEa7cTWStY2BPFU4aRZTR6v 5i/gmZ4m3nOUyC8SzYcCILkhlqmVSDDsvLTweZ/MQOLStOwmlJedszOWqGmj0n8Snih0 OuAEcIMvKv32Jb0/ol4sDSeKnNw9xKVzHjS14B46SIheXGhmKYxXIZME0eXLuZHMudgH 2dUI5Pbb9Z5nARXYHBE+n04vdKTBe4O+keS6YKTePHhP6OCWKNvUhzTw/B54EL8/jT3l bh01exVLSknm/FEmy8q6VCtKIPMsm+PC7ZdbD1jCN/K8cox98wM6CdvbyjVJ3xK0SQmn Bw9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KBNKLDko; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f18-20020ac859d2000000b0034488de98d8si1047633qtf.755.2022.10.04.12.55.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 04 Oct 2022 12:55:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KBNKLDko; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:34362 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ofo0Q-0001nB-Gh for patch@linaro.org; Tue, 04 Oct 2022 15:55:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41268) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ofnyG-0001iS-2G for qemu-devel@nongnu.org; Tue, 04 Oct 2022 15:52:52 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]:46614) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ofnyE-0000GD-FH for qemu-devel@nongnu.org; Tue, 04 Oct 2022 15:52:51 -0400 Received: by mail-pl1-x62a.google.com with SMTP id l1so729895pld.13 for ; Tue, 04 Oct 2022 12:52:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=St5dCg8yC5zIkIV0jUFWp9UWjpefIW881mvaUfGPCfo=; b=KBNKLDkoV6FyvbfjKKLGdRo3UUeOFuWALGQt/O7p7ylLoI4IMaE8rYSNu0a04WqIwM Ha0WUHTgWqLyAXXgp4YlNtmrgG15mfS0J1UJLmmQP7Dzk0Vd2mhtPm3S7xqHmKRmkgqe pkZP1Ft/sqEuagv8q3FSPGN8sA6Lnv7+mWT3eOhAOcx7kp1JBbE7qf5G33CuHWkJuKn1 FelsDWIDzVvzI5wWJDnnbyyVucl5HsZbHW2ymh2TXDk80SV+P4MU53txb7GQ9wg1dqyo J5MD/OP3/8rt+mBY6mt3lUN4sQ1NP2839ow6PRHJZ1RoR0tl8YrNuAWVxp3iPUq3q+XQ 2Q+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=St5dCg8yC5zIkIV0jUFWp9UWjpefIW881mvaUfGPCfo=; b=zDUAD41fT1JYSF2ttyFnXm9B+bsB2j20ye/gLilzfXqnhe730jI4Sl+KDNRBIgwLrT UTjHdgSfpL6xm778osz3caWpwbZ5LincSpAYjukrRUGA8fglDz60HkbWAV+V26aHD09q BHkKgdlUovfqrhUTzNLfpLwj720jWw4NsmU/8UnjVKcuwxdPviVC+RedD8vMlPqBz0uk b9I7/NuEvETgCFyQfuiQaooJcJDMun7OS3Ml4yPe99WsMPGRsW1pPufX2/WG0dLPtKTN ziT5X+8UHHbZYHKI5uBdtM0Qak4DGs5adIhRU197hE4fdl4CbUM4ULsb3twZtLzH3/yb vUwQ== X-Gm-Message-State: ACrzQf3Hi+7aLNTZ4p9b19B61/nUX7Zeds6QuUzvjuZNJh+AF1aV2heX L+gaqPbZk07+rs08dYfw9q5r5qRUvOU3ew== X-Received: by 2002:a17:90a:1c02:b0:1e0:df7:31f2 with SMTP id s2-20020a17090a1c0200b001e00df731f2mr1264580pjs.222.1664913168688; Tue, 04 Oct 2022 12:52:48 -0700 (PDT) Received: from stoup.. ([2602:47:d49d:ec01:526e:3326:a84e:e5e3]) by smtp.gmail.com with ESMTPSA id u23-20020a1709026e1700b00172973d3cd9sm9293406plk.55.2022.10.04.12.52.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Oct 2022 12:52:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: stefanha@redhat.com, =?utf-8?q?Alex_Benn=C3=A9e?= , David Hildenbrand , Peter Maydell Subject: [PULL 06/20] accel/tcg: Suppress auto-invalidate in probe_access_internal Date: Tue, 4 Oct 2022 12:52:27 -0700 Message-Id: <20221004195241.46491-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221004195241.46491-1-richard.henderson@linaro.org> References: <20221004195241.46491-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" When PAGE_WRITE_INV is set when calling tlb_set_page, we immediately set TLB_INVALID_MASK in order to force tlb_fill to be called on the next lookup. Here in probe_access_internal, we have just called tlb_fill and eliminated true misses, thus the lookup must be valid. This allows us to remove a warning comment from s390x. There doesn't seem to be a reason to change the code though. Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 10 +++++++++- target/s390x/tcg/mem_helper.c | 4 ---- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index d06ff44ce9..264f84a248 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1533,6 +1533,7 @@ static int probe_access_internal(CPUArchState *env, target_ulong addr, } tlb_addr = tlb_read_ofs(entry, elt_ofs); + flags = TLB_FLAGS_MASK; page_addr = addr & TARGET_PAGE_MASK; if (!tlb_hit_page(tlb_addr, page_addr)) { if (!victim_tlb_hit(env, mmu_idx, index, elt_ofs, page_addr)) { @@ -1547,10 +1548,17 @@ static int probe_access_internal(CPUArchState *env, target_ulong addr, /* TLB resize via tlb_fill may have moved the entry. */ entry = tlb_entry(env, mmu_idx, addr); + + /* + * With PAGE_WRITE_INV, we set TLB_INVALID_MASK immediately, + * to force the next access through tlb_fill. We've just + * called tlb_fill, so we know that this entry *is* valid. + */ + flags &= ~TLB_INVALID_MASK; } tlb_addr = tlb_read_ofs(entry, elt_ofs); } - flags = tlb_addr & TLB_FLAGS_MASK; + flags &= tlb_addr; /* Fold all "mmio-like" bits into TLB_MMIO. This is not RAM. */ if (unlikely(flags & ~(TLB_WATCHPOINT | TLB_NOTDIRTY))) { diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index fc52aa128b..3758b9e688 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -148,10 +148,6 @@ static int s390_probe_access(CPUArchState *env, target_ulong addr, int size, #else int flags; - /* - * For !CONFIG_USER_ONLY, we cannot rely on TLB_INVALID_MASK or haddr==NULL - * to detect if there was an exception during tlb_fill(). - */ env->tlb_fill_exc = 0; flags = probe_access_flags(env, addr, access_type, mmu_idx, nonfault, phost, ra);