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[26/29] target/openrisc: Always exit after mtspr npc

Message ID 20221024132459.3229709-28-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg: Fix x86 TARGET_TB_PCREL (#1269) | expand

Commit Message

Richard Henderson Oct. 24, 2022, 1:24 p.m. UTC
We have called cpu_restore_state asserting will_exit.
Do not go back on that promise.  This affects icount.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/openrisc/sys_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Philippe Mathieu-Daudé Oct. 25, 2022, 3:39 p.m. UTC | #1
On 24/10/22 15:24, Richard Henderson wrote:
> We have called cpu_restore_state asserting will_exit.
> Do not go back on that promise.  This affects icount.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/openrisc/sys_helper.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
> index 09b3c97d7c..a3508e421d 100644
> --- a/target/openrisc/sys_helper.c
> +++ b/target/openrisc/sys_helper.c
> @@ -51,8 +51,8 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)

Extending the diff context from commit 24c328521b ("Tidy ppc/npc 
implementation"):

             cpu_restore_state(cs, GETPC(), true);
             /* ??? Mirror or1ksim in not trashing delayed branch state
               when "jumping" to the current instruction.  */

>           if (env->pc != rb) {
>               env->pc = rb;
>               env->dflag = 0;
> -            cpu_loop_exit(cs);
>           }
> +        cpu_loop_exit(cs);

Is the comment still relevant?

>           break;
>   
>       case TO_SPR(0, 17): /* SR */
Richard Henderson Oct. 25, 2022, 3:49 p.m. UTC | #2
On 10/26/22 01:39, Philippe Mathieu-Daudé wrote:
> On 24/10/22 15:24, Richard Henderson wrote:
>> We have called cpu_restore_state asserting will_exit.
>> Do not go back on that promise.  This affects icount.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   target/openrisc/sys_helper.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
>> index 09b3c97d7c..a3508e421d 100644
>> --- a/target/openrisc/sys_helper.c
>> +++ b/target/openrisc/sys_helper.c
>> @@ -51,8 +51,8 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, 
>> target_ulong rb)
> 
> Extending the diff context from commit 24c328521b ("Tidy ppc/npc implementation"):
> 
>              cpu_restore_state(cs, GETPC(), true);
>              /* ??? Mirror or1ksim in not trashing delayed branch state
>                when "jumping" to the current instruction.  */
> 
>>           if (env->pc != rb) {
>>               env->pc = rb;
>>               env->dflag = 0;
>> -            cpu_loop_exit(cs);
>>           }
>> +        cpu_loop_exit(cs);
> 
> Is the comment still relevant?

Yes, in that when pc == rb we don't clear dflag.
The only change here is exiting to the main loop before starting the next insn.

r~
diff mbox series

Patch

diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index 09b3c97d7c..a3508e421d 100644
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -51,8 +51,8 @@  void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
         if (env->pc != rb) {
             env->pc = rb;
             env->dflag = 0;
-            cpu_loop_exit(cs);
         }
+        cpu_loop_exit(cs);
         break;
 
     case TO_SPR(0, 17): /* SR */