From patchwork Thu Oct 27 10:26:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 619183 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp185768pvb; Thu, 27 Oct 2022 03:27:42 -0700 (PDT) X-Google-Smtp-Source: AMsMyM57ZUoRj2bF6EsUn21k2P4QpYu5J2fu1ojdOgi1IFSz6nqb0kpb/c/l+MHnz11dqsURPwQb X-Received: by 2002:ac8:59c4:0:b0:39c:bab7:f937 with SMTP id f4-20020ac859c4000000b0039cbab7f937mr40866716qtf.657.1666866462092; Thu, 27 Oct 2022 03:27:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666866462; cv=none; d=google.com; s=arc-20160816; b=r8ONfrFqSufhtTWVNWhzA4kqvIttvnkiqrqHfDSm9wUfZguJrGccSHuLFPsn43LczK HN6yCg9qKu5Vbeh/izPEAWJrMNOZfcnkzqPS/AClAsIOLgCfQeYbE9M0Ncu6NlgQPRKw Sggze5yU1ifJ3Qa3WeB8PSotgeEhMVWj9KY6E/s416coyK3DU8lkqJijydgdvY5A6L6S FrZGUFe47RStuaJrnNyYRK+LbKOH1uD/oABivoem4JgvFUgL2vSs+lkwZrqWoXretkTf swKffIZUrzyvZ6LYhWkSHvnuUMcxzydU/eFBrfI5DZTj+77Hc2nmmXGrord4db+ifrLk fMCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:sender:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:cc:to:from:dkim-signature; bh=z7O5nwx9MVdfPPYUrmEF8gDfSezfAGMOxc7S8gIU05o=; b=dvv1/CMAiXKsXjvxzw6a2FcvzCQ7/v9td0Z8J9zipEODDbn7gR8OKOA8PMSkt23Gkn H+zLIZy3Nsz5iGlhbyKjnbvyPlKJEqHZI4lgadRs86Nu31bNr/AQaOeh+CYdk8AlXCoI 6c32QAcOp1tOorg4xs2/6ji6+diErKFQKcFDPgrHhvrlCFB2exvzsKksl85A5+SFiJPg +k0bQ/6kYa+Lr53V5KYYDW1U+9opkIVQaK4ZPTO4rzKYaw/AFbUmkNQ62Oni3spy2VS1 KLUTBtb59QDkDz1NODFnZVJPNsJ1Dlq2f3oBhqha34vdOwyecG05eTXfrts95mDLn2/d 0vQw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="fGb/Rrn7"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l14-20020ac8724e000000b003a4f054fc2asi620637qtp.141.2022.10.27.03.27.41 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 27 Oct 2022 03:27:42 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="fGb/Rrn7"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oo06H-00077B-KS; Thu, 27 Oct 2022 06:27:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oo05m-0002er-Em for qemu-devel@nongnu.org; Thu, 27 Oct 2022 06:26:30 -0400 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oo05h-0008CM-7b for qemu-devel@nongnu.org; Thu, 27 Oct 2022 06:26:29 -0400 Received: by mail-pf1-x432.google.com with SMTP id m6so1087657pfb.0 for ; Thu, 27 Oct 2022 03:26:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=z7O5nwx9MVdfPPYUrmEF8gDfSezfAGMOxc7S8gIU05o=; b=fGb/Rrn7pA7d2uyKABJEFd6UE7jFKC/A5P0JRLexerg0AXXvJ64LEw4u9HalR+mJVI 6yD77H9JCMalE1iHC1gkBlGc/VEPAPQm73r/9K9hdhzMC63SYB+OIU2Xr4fqklQIPdGt JjEIZkNEsSQSX4J7O/XYGTCuhD5KQ6fhUqLbVeoEe5YMWqRXKDuEVwxJ8a41qUFnvf1C adQ4H9YpNVyxiqB6mY6D/zFGqWQBSRABk+PCrYuQeGHfE+wFkrtLRq8hGFJnaSfUAmZP HkDCFgsaraOI6cQdWzV4Z+CWJwlSJRe4pUm8rM63aEjPVcROnI3meLGlmw/Xzpz2/62a 740g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=z7O5nwx9MVdfPPYUrmEF8gDfSezfAGMOxc7S8gIU05o=; b=qWZiBTfl1WDF8N3LyGZO2gjYYadgj+fYkVPgl+B+o1mBtiigjCPsgmJwKKy0qBhbed IywaeRyfk/QNJCd+gdGaXJhYCX1xrB5V5sJKp4kUMrmooTdbiblYLFY+kfMmqgG2ShO+ Kn4DPkjVTR/EKhdSQcyh+uvfJkThChFdAlLIVHGFac6QU0s/pKp7MCzkg4znsxe5HQWU RP9/4i+LvuDZm53l2OHvz/Q876pGL7+LofrGteUxtweqYlj8ieCRZrxhaTLeMI53N/lt ltFd3q1Jpwwy11DYneipSKvDICZxzdac8p4KJfjtODdY8SBrVyhav8JG9DWreChpxYiP tPaw== X-Gm-Message-State: ACrzQf0ANDBDTjkCxL403pYg4NVqIH4ac7M9lm5NR6WsFBGoO59+HthV YNbSoVZS8JduO0InCKNZf1Tkq96biQgW0M7P X-Received: by 2002:aa7:94b1:0:b0:56c:8da8:4e3 with SMTP id a17-20020aa794b1000000b0056c8da804e3mr3569942pfl.62.1666866382869; Thu, 27 Oct 2022 03:26:22 -0700 (PDT) Received: from localhost.localdomain ([2001:8003:501a:d301:3a91:9408:3918:55a]) by smtp.gmail.com with ESMTPSA id x67-20020a623146000000b0056b932f3280sm884569pfx.103.2022.10.27.03.26.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Oct 2022 03:26:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, eduardo@habkost.net Subject: [PATCH] target/i386: Expand eflags updates inline Date: Thu, 27 Oct 2022 21:26:15 +1100 Message-Id: <20221027102615.253354-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org The helpers for reset_rf, cli, sti, clac, stac are completely trivial; implement them inline. Drop some nearby #if 0 code. Signed-off-by: Richard Henderson Reviewed-by: Paolo Bonzini Reviewed-by: Philippe Mathieu-Daudé --- target/i386/helper.h | 5 ----- target/i386/tcg/cc_helper.c | 41 ------------------------------------- target/i386/tcg/translate.c | 30 ++++++++++++++++++++++----- 3 files changed, 25 insertions(+), 51 deletions(-) diff --git a/target/i386/helper.h b/target/i386/helper.h index 88143b2a24..b7de5429ef 100644 --- a/target/i386/helper.h +++ b/target/i386/helper.h @@ -56,13 +56,8 @@ DEF_HELPER_2(syscall, void, env, int) DEF_HELPER_2(sysret, void, env, int) #endif DEF_HELPER_FLAGS_2(pause, TCG_CALL_NO_WG, noreturn, env, int) -DEF_HELPER_1(reset_rf, void, env) DEF_HELPER_FLAGS_3(raise_interrupt, TCG_CALL_NO_WG, noreturn, env, int, int) DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, int) -DEF_HELPER_1(cli, void, env) -DEF_HELPER_1(sti, void, env) -DEF_HELPER_1(clac, void, env) -DEF_HELPER_1(stac, void, env) DEF_HELPER_3(boundw, void, env, tl, int) DEF_HELPER_3(boundl, void, env, tl, int) diff --git a/target/i386/tcg/cc_helper.c b/target/i386/tcg/cc_helper.c index cc7ea9e8b9..6227dbb30b 100644 --- a/target/i386/tcg/cc_helper.c +++ b/target/i386/tcg/cc_helper.c @@ -346,44 +346,3 @@ void helper_clts(CPUX86State *env) env->cr[0] &= ~CR0_TS_MASK; env->hflags &= ~HF_TS_MASK; } - -void helper_reset_rf(CPUX86State *env) -{ - env->eflags &= ~RF_MASK; -} - -void helper_cli(CPUX86State *env) -{ - env->eflags &= ~IF_MASK; -} - -void helper_sti(CPUX86State *env) -{ - env->eflags |= IF_MASK; -} - -void helper_clac(CPUX86State *env) -{ - env->eflags &= ~AC_MASK; -} - -void helper_stac(CPUX86State *env) -{ - env->eflags |= AC_MASK; -} - -#if 0 -/* vm86plus instructions */ -void helper_cli_vm(CPUX86State *env) -{ - env->eflags &= ~VIF_MASK; -} - -void helper_sti_vm(CPUX86State *env) -{ - env->eflags |= VIF_MASK; - if (env->eflags & VIP_MASK) { - raise_exception_ra(env, EXCP0D_GPF, GETPC()); - } -} -#endif diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index e19d5c1c64..dc1fa9f9ed 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -2745,6 +2745,26 @@ static void gen_reset_hflag(DisasContext *s, uint32_t mask) } } +static void gen_set_eflags(DisasContext *s, target_ulong mask) +{ + TCGv t = tcg_temp_new(); + + tcg_gen_ld_tl(t, cpu_env, offsetof(CPUX86State, eflags)); + tcg_gen_ori_tl(t, t, mask); + tcg_gen_st_tl(t, cpu_env, offsetof(CPUX86State, eflags)); + tcg_temp_free(t); +} + +static void gen_reset_eflags(DisasContext *s, target_ulong mask) +{ + TCGv t = tcg_temp_new(); + + tcg_gen_ld_tl(t, cpu_env, offsetof(CPUX86State, eflags)); + tcg_gen_andi_tl(t, t, ~mask); + tcg_gen_st_tl(t, cpu_env, offsetof(CPUX86State, eflags)); + tcg_temp_free(t); +} + /* Clear BND registers during legacy branches. */ static void gen_bnd_jmp(DisasContext *s) { @@ -2775,7 +2795,7 @@ do_gen_eob_worker(DisasContext *s, bool inhibit, bool recheck_tf, bool jr) } if (s->base.tb->flags & HF_RF_MASK) { - gen_helper_reset_rf(cpu_env); + gen_reset_eflags(s, RF_MASK); } if (recheck_tf) { gen_helper_rechecking_single_step(cpu_env); @@ -5501,12 +5521,12 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) #endif case 0xfa: /* cli */ if (check_iopl(s)) { - gen_helper_cli(cpu_env); + gen_reset_eflags(s, IF_MASK); } break; case 0xfb: /* sti */ if (check_iopl(s)) { - gen_helper_sti(cpu_env); + gen_set_eflags(s, IF_MASK); /* interruptions are enabled only the first insn after sti */ gen_update_eip_next(s); gen_eob_inhibit_irq(s, true); @@ -5788,7 +5808,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) || CPL(s) != 0) { goto illegal_op; } - gen_helper_clac(cpu_env); + gen_reset_eflags(s, AC_MASK); s->base.is_jmp = DISAS_EOB_NEXT; break; @@ -5797,7 +5817,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) || CPL(s) != 0) { goto illegal_op; } - gen_helper_stac(cpu_env); + gen_set_eflags(s, AC_MASK); s->base.is_jmp = DISAS_EOB_NEXT; break;