From patchwork Thu Dec 15 12:50:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634193 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp130867pvb; Thu, 15 Dec 2022 04:58:53 -0800 (PST) X-Google-Smtp-Source: AA0mqf7ZLCU5KEBU8H9cnqVe/B53G9rd/4mt7deDqzyrbp+LJmTwJgb9/QismznXGk5V52/+vTks X-Received: by 2002:ac8:4a17:0:b0:3a7:e2df:e868 with SMTP id x23-20020ac84a17000000b003a7e2dfe868mr35839111qtq.41.1671109133293; Thu, 15 Dec 2022 04:58:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671109133; cv=none; d=google.com; s=arc-20160816; b=sz+kFHJvMQp7/K87vN2ljwEkaZ312I+9Z1zrxVYPts3jBjKN7M/nfLRdguBBqxi1JA h8toxMG4xw9QaLjhus1L27Xj0alzVA9tpDLDxU/8SuXMHY0OP/sTZb9RQ4jUQtzW2BsB dSENL07BKkYzyR4ihrF4qn03RVpmvDi34/mHoYR9Zy/ptjwNi9vmqSzG7HQIZcgpoQEG 5dHjAXx6ZgpO49tEgPyktRfkLWaM5WXPIwesK0qEw8wbqKr2286A3bDvQ49zyIKeZqKy 6JNHEBRP7B+P7r9u9wI+65SFhG6qYbyaoknSD2Xm6315zTjUO523eUMcvtFFdyROsW0Z F4Zw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Sb8rZwHrNhrvr6X/OgCKlqVcv8NJTW1C2wl4Tbc0DMM=; b=IPn2hvoDz70obYEBvG6o90gs7ZMEQ135B1Q7H0xNIIDRS+tySBrjMA6dxBVMRJCN4o 7SPkUpLyd51KPmuqpr+QTI4wMFWMwhhrqyD0d5eoHnvzO25cGqjet4qNHgVl9KvjiWqG kbCV8r48UfLU8QZfxb2xkIyQqy4HNczM9B1YKYTswOummQI6KYr1LTJ586L34OIb28rz o8kTMb8r0E6Uh2t681Hw8FYe78h+sZTKiiSg1ZNir6uqz/dL89ZOzrKGS00nGkXaiFnK Khk+I1YRAxSgs5NunuWNr/8LT121kvOiiU5vjztqBHs5xIz814ZiO6Es4oa+h/ChvmAa S8iA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Rkth8aY0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id v9-20020ac87489000000b00343582e11c7si1418488qtq.603.2022.12.15.04.58.53 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 15 Dec 2022 04:58:53 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Rkth8aY0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p5nhU-00076t-QL; Thu, 15 Dec 2022 07:51:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p5nh4-0006pm-C0 for qemu-devel@nongnu.org; Thu, 15 Dec 2022 07:50:34 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p5nh2-000499-MS for qemu-devel@nongnu.org; Thu, 15 Dec 2022 07:50:34 -0500 Received: by mail-wm1-x333.google.com with SMTP id o5-20020a05600c510500b003d21f02fbaaso1596532wms.4 for ; Thu, 15 Dec 2022 04:50:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=Sb8rZwHrNhrvr6X/OgCKlqVcv8NJTW1C2wl4Tbc0DMM=; b=Rkth8aY08hhwADcOuqNzvAxeLga+JfzOWSJWzc2RLTxZuWpHTu8wHgATffzxUgSQEU awFL8ZskKjI4H4C2HUZbasDEJfuAiPgV6uKilsubqJ0e7g9I4uP/qySVj8kFG9j9Y/Ng OjWYYeroQdAg8sr7uW0OqsKUlqlD+le9v3PR/odfHDQ/0y6uCVIXMU3v8cXvewFP5Cpn 1i+BdfXTYCs3WJVWUbqtwooqPcYXFRh3/36Pp4LQSzxX12dOgYL1RzLN61zGnqRQW+md uLlTPPPYVynwLwcNs9XsWC8nPmRY2OW0fh9zKjfXyrzL1DAwtp+H9iWfisJq7rWe8owl b4Zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Sb8rZwHrNhrvr6X/OgCKlqVcv8NJTW1C2wl4Tbc0DMM=; b=1QKim7yizhY7/VQZjQJTnQGvnQTbnUl96NYhic643i4jrAWO+AqrYaLRLU5FTc3Js5 CF0pA+jLkhgoX8l2KNJE+zfEQNT9A8riB2kEURubA/WOwRhtv30ikMLbn9It9cPCmx12 Le9igd+7JARBRcQeQzVrfPqwjraDGpRBj1EFkUy4OhSIAF01t8mN6+C4+qHPHux8ExP5 Qix3fLczM+fAX3IVU8R496O1YihNItMlhnxUsdo7nP4VINZlCUzS/tqGJZHhSILHUUhl K1+SY/85VDjOMhvbaMnVeWF+GwCQhGac3rlwgELR0HhM8yLztcdA7IgOuSjdaPmLpe3o XQXQ== X-Gm-Message-State: ANoB5pll5j4fied57hIaENYCsyH3JNzMMVgoE0HM6Zf7rp7I7Og0Yvaj MP+Cu1U+s1YsZst/vycBrFZ0+z9X4qWeuBgb X-Received: by 2002:a05:600c:1d83:b0:3c7:a5:610c with SMTP id p3-20020a05600c1d8300b003c700a5610cmr21692970wms.16.1671108630031; Thu, 15 Dec 2022 04:50:30 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id i12-20020a05600c354c00b003cfd64b6be1sm8388787wmq.27.2022.12.15.04.50.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Dec 2022 04:50:29 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 20/29] hw/intc: Convert TYPE_ARM_GIC_KVM to 3-phase reset Date: Thu, 15 Dec 2022 12:50:00 +0000 Message-Id: <20221215125009.980128-21-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221215125009.980128-1-peter.maydell@linaro.org> References: <20221215125009.980128-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Now we have converted TYPE_ARM_GIC_COMMON, we can convert the TYPE_ARM_GIC_KVM subclass to 3-phase reset. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221109161444.3397405-5-peter.maydell@linaro.org --- hw/intc/arm_gic_kvm.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c index 7d2a13273a4..1d588946bce 100644 --- a/hw/intc/arm_gic_kvm.c +++ b/hw/intc/arm_gic_kvm.c @@ -38,7 +38,7 @@ DECLARE_OBJ_CHECKERS(GICState, KVMARMGICClass, struct KVMARMGICClass { ARMGICCommonClass parent_class; DeviceRealize parent_realize; - void (*parent_reset)(DeviceState *dev); + ResettablePhases parent_phases; }; void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level) @@ -473,12 +473,14 @@ static void kvm_arm_gic_get(GICState *s) } } -static void kvm_arm_gic_reset(DeviceState *dev) +static void kvm_arm_gic_reset_hold(Object *obj) { - GICState *s = ARM_GIC_COMMON(dev); + GICState *s = ARM_GIC_COMMON(obj); KVMARMGICClass *kgc = KVM_ARM_GIC_GET_CLASS(s); - kgc->parent_reset(dev); + if (kgc->parent_phases.hold) { + kgc->parent_phases.hold(obj); + } if (kvm_arm_gic_can_save_restore(s)) { kvm_arm_gic_put(s); @@ -593,6 +595,7 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp) static void kvm_arm_gic_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); ARMGICCommonClass *agcc = ARM_GIC_COMMON_CLASS(klass); KVMARMGICClass *kgc = KVM_ARM_GIC_CLASS(klass); @@ -600,7 +603,8 @@ static void kvm_arm_gic_class_init(ObjectClass *klass, void *data) agcc->post_load = kvm_arm_gic_put; device_class_set_parent_realize(dc, kvm_arm_gic_realize, &kgc->parent_realize); - device_class_set_parent_reset(dc, kvm_arm_gic_reset, &kgc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, kvm_arm_gic_reset_hold, NULL, + &kgc->parent_phases); } static const TypeInfo kvm_arm_gic_info = {