From patchwork Thu Dec 15 12:49:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634180 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp127248pvb; Thu, 15 Dec 2022 04:50:58 -0800 (PST) X-Google-Smtp-Source: AA0mqf4tC0EB+IWIMkU8tNHwm1DlLY2kXCRvkMZJn6LsX7IEm+RpPi5p+OiM8r+x7jI5JIkCGU3i X-Received: by 2002:ac8:668d:0:b0:3a8:1ced:d2e1 with SMTP id d13-20020ac8668d000000b003a81cedd2e1mr17230140qtp.2.1671108658500; Thu, 15 Dec 2022 04:50:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671108658; cv=none; d=google.com; s=arc-20160816; b=k/rFzoGKhBpIBfSt5qD4NtV9vnqvMA2gL0HZ5Nnp6VN5TB7dbD4nyhUqLvp3fgUHQj Kl5mYMkbpjSAfJnZQ6i16Nf3HuvT+v0sOcG+Vp5fvDgknVDpveUeR05rSceWqbT1+z79 XyzHRzvD0s6XZ2+pgh337PEOQNUtqbePQ0GC4Eb8yn2pCFR3Xd28gwANWSBEvISpiJMg HpGZM6bBTINE0lMqdLjzQZ9LeWze9vrwcTWQ7HciWuGT6l4BN0a7hV5yAXDQkpIsBUTj C5psVCNkpY1T80mty31ayXxsNlMiel2mtSB15d7O2D8ojPbF03ITZO/a4DrXEENZ9cG4 sy6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=8crXX2Vz1e8DxMP/PXNKOUHg5I2gJfVv7C5htrZV0hQ=; b=AgrTCh0jwbs5RGqN0c8synwFLR0krTfppr5AriyPIEn368QO+DU6Hk9D3USqPgS9kt dufPwUJwNmA2wBp0vv/e6jRfnLa3le3urnGV2cY4+ArQVtq6unZo3eAkVU9Pnhd0xbVC Ajtp81fCjspFnWmmfqm854thY6s4oTs1OLRWLKCaoAbAZT9IL1L3StEw+AqApCcYi9v1 B/an61VY0e2JjisHSWLNpH2U/guDxN2dukFLNns5dJMyHKHqBdwsQtEmAzpFw/mOgqOk J8bU0AwS/MOILZtnIhFCAkQJGmhz6ZQtBwm4mUs4e18y100STsh3ZFdlfKL55UuYnr2e TmrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zGTncryI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id u14-20020ac8750e000000b003a622111f91si3637152qtq.26.2022.12.15.04.50.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 15 Dec 2022 04:50:58 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zGTncryI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p5ngs-0006h4-PH; Thu, 15 Dec 2022 07:50:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p5ngq-0006eK-0N for qemu-devel@nongnu.org; Thu, 15 Dec 2022 07:50:20 -0500 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p5ngn-00046B-Vn for qemu-devel@nongnu.org; Thu, 15 Dec 2022 07:50:19 -0500 Received: by mail-wm1-x32a.google.com with SMTP id h8-20020a1c2108000000b003d1efd60b65so1663822wmh.0 for ; Thu, 15 Dec 2022 04:50:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=8crXX2Vz1e8DxMP/PXNKOUHg5I2gJfVv7C5htrZV0hQ=; b=zGTncryIwrXkfifsxg9K/ZhAeMYtV6afZ72swIF7drBAU1N+Y0YrJ2DZIdUJsvVRA7 Qo10yS34744wMTF/vIH4QPKBkVdLB0QZjN+QIKnP5vmofjgt77c2ta12AgIEkRDOBXBN kbIIXBUYtDz+dN0uqpOhLEYkMhUTp10MnDXOaKV91wVc7qEvvkSBG+iDxMizkheSSVgq LgqQv1pprpPd0rdGM1VDOwngPaS0v92wS6h2SNkRUIVWqRdNiF7Hh+wCETfBLBGZ4/yf 9V6nKChKmwgQk5M5vRQ4ij+X4rYuoxJyhZJ+ke7/HtFCz3KSbf36WJUhvpit2/qbcE25 yjlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8crXX2Vz1e8DxMP/PXNKOUHg5I2gJfVv7C5htrZV0hQ=; b=MGJlJ7Q96LiFsp9+lKwOjkwH03OrL+hueMg5V9QHBLLbRCxKCMSwKUGgqfLtWZEVSZ 2nqFHyzZahLBoE+yK3kJWaulInKRs3YvA+xNc01ZjzcfIft8WNy+u4PZkdwxbEe7Ahyn Sl8PtWFSkITQ91T3mHFNVTTF9NqA/Oa4eX+unkXsMrPhS+bexXI2i9cKDLs0VtFmq79b U4dzuVD6MwVgzr1wCFR/wMUuopnC3gQ69aTRELmlIr3Kd7dGf+01a4Ys1HNBnVY5A5WY 8yzgK5Lu828GO5Ltwd+13+MH+ga7+hLIXSVusCSKYxMtY0yu11d8kno8eLei0K7XLKDx BDTA== X-Gm-Message-State: ANoB5pmNGA4tZGYlMrUy5zotkXf8MLAdptX6ypWUMO0eHgabTqf+A8Ak gurjD85KeVHWQI/ZW+pq0FHCfJBW1Qj9zgoI X-Received: by 2002:a05:600c:1c93:b0:3d0:7026:f0ad with SMTP id k19-20020a05600c1c9300b003d07026f0admr21677417wms.38.1671108616724; Thu, 15 Dec 2022 04:50:16 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id i12-20020a05600c354c00b003cfd64b6be1sm8388787wmq.27.2022.12.15.04.50.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Dec 2022 04:50:16 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 05/29] hw/arm/virt: Improve high memory region address assignment Date: Thu, 15 Dec 2022 12:49:45 +0000 Message-Id: <20221215125009.980128-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221215125009.980128-1-peter.maydell@linaro.org> References: <20221215125009.980128-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Gavin Shan There are three high memory regions, which are VIRT_HIGH_REDIST2, VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base addresses are floating on highest RAM address. However, they can be disabled in several cases. (1) One specific high memory region is likely to be disabled by code by toggling vms->highmem_{redists, ecam, mmio}. (2) VIRT_HIGH_PCIE_ECAM region is disabled on machine, which is 'virt-2.12' or ealier than it. (3) VIRT_HIGH_PCIE_ECAM region is disabled when firmware is loaded on 32-bits system. (4) One specific high memory region is disabled when it breaks the PA space limit. The current implementation of virt_set_{memmap, high_memmap}() isn't optimized because the high memory region's PA space is always reserved, regardless of whatever the actual state in the corresponding vms->highmem_{redists, ecam, mmio} flag. In the code, 'base' and 'vms->highest_gpa' are always increased for case (1), (2) and (3). It's unnecessary since the assigned PA space for the disabled high memory region won't be used afterwards. Improve the address assignment for those three high memory region by skipping the address assignment for one specific high memory region if it has been disabled in case (1), (2) and (3). The memory layout may be changed after the improvement is applied, which leads to potential migration breakage. So 'vms->highmem_compact' is added to control if the improvement should be applied. For now, 'vms->highmem_compact' is set to false, meaning that we don't have memory layout change until it becomes configurable through property 'compact-highmem' in next patch. Signed-off-by: Gavin Shan Reviewed-by: Eric Auger Reviewed-by: Cornelia Huck Reviewed-by: Marc Zyngier Tested-by: Zhenyu Zhang Message-id: 20221029224307.138822-6-gshan@redhat.com Signed-off-by: Peter Maydell --- include/hw/arm/virt.h | 1 + hw/arm/virt.c | 15 ++++++++++----- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 6ec479ca2b7..709f6237412 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -144,6 +144,7 @@ struct VirtMachineState { PFlashCFI01 *flash[2]; bool secure; bool highmem; + bool highmem_compact; bool highmem_ecam; bool highmem_mmio; bool highmem_redists; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 7689337470a..807175707e7 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1722,18 +1722,23 @@ static void virt_set_high_memmap(VirtMachineState *vms, vms->memmap[i].size = region_size; /* - * Check each device to see if they fit in the PA space, - * moving highest_gpa as we go. + * Check each device to see if it fits in the PA space, + * moving highest_gpa as we go. For compatibility, move + * highest_gpa for disabled fitting devices as well, if + * the compact layout has been disabled. * * For each device that doesn't fit, disable it. */ fits = (region_base + region_size) <= BIT_ULL(pa_bits); - if (fits) { - vms->highest_gpa = region_base + region_size - 1; + *region_enabled &= fits; + if (vms->highmem_compact && !*region_enabled) { + continue; } - *region_enabled &= fits; base = region_base + region_size; + if (fits) { + vms->highest_gpa = base - 1; + } } }