@@ -30,7 +30,7 @@
#include "qom/object.h"
typedef ArmSbconI2CState VersatileI2CState;
-DECLARE_INSTANCE_CHECKER(VersatileI2CState, VERSATILE_I2C,
+DECLARE_INSTANCE_CHECKER(ArmSbconI2CState, VERSATILE_I2C,
TYPE_VERSATILE_I2C)
@@ -45,7 +45,7 @@ REG32(CONTROL_CLR, 4)
static uint64_t versatile_i2c_read(void *opaque, hwaddr offset,
unsigned size)
{
- VersatileI2CState *s = opaque;
+ ArmSbconI2CState *s = opaque;
switch (offset) {
case A_CONTROL_SET:
@@ -60,7 +60,7 @@ static uint64_t versatile_i2c_read(void *opaque, hwaddr offset,
static void versatile_i2c_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
- VersatileI2CState *s = opaque;
+ ArmSbconI2CState *s = opaque;
switch (offset) {
case A_CONTROL_SET:
@@ -86,7 +86,7 @@ static const MemoryRegionOps versatile_i2c_ops = {
static void versatile_i2c_init(Object *obj)
{
DeviceState *dev = DEVICE(obj);
- VersatileI2CState *s = VERSATILE_I2C(obj);
+ ArmSbconI2CState *s = VERSATILE_I2C(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
I2CBus *bus;
@@ -100,7 +100,7 @@ static void versatile_i2c_init(Object *obj)
static const TypeInfo versatile_i2c_info = {
.name = TYPE_VERSATILE_I2C,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(VersatileI2CState),
+ .instance_size = sizeof(ArmSbconI2CState),
.instance_init = versatile_i2c_init,
};
@@ -21,8 +21,7 @@
#define TYPE_ARM_SBCON_I2C TYPE_VERSATILE_I2C
typedef struct ArmSbconI2CState ArmSbconI2CState;
-DECLARE_INSTANCE_CHECKER(ArmSbconI2CState, ARM_SBCON_I2C,
- TYPE_ARM_SBCON_I2C)
+DECLARE_INSTANCE_CHECKER(ArmSbconI2CState, ARM_SBCON_I2C, TYPE_ARM_SBCON_I2C)
struct ArmSbconI2CState {
/*< private >*/