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Thu, 12 Jan 2023 02:25:08 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Laurent Vivier , Peter Maydell , Fabiano Rosas , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 6/7] target/arm/sme: Rebuild hflags in aarch64_set_svcr() Date: Thu, 12 Jan 2023 11:24:35 +0100 Message-Id: <20230112102436.1913-7-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230112102436.1913-1-philmd@linaro.org> References: <20230112102436.1913-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé --- linux-user/aarch64/cpu_loop.c | 8 +------- linux-user/aarch64/signal.c | 3 --- target/arm/helper.c | 6 +++++- target/arm/sme_helper.c | 8 -------- 4 files changed, 6 insertions(+), 19 deletions(-) diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 5e93d27d8f..2e2f7cf218 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -89,14 +89,8 @@ void cpu_loop(CPUARMState *env) switch (trapnr) { case EXCP_SWI: - /* - * On syscall, PSTATE.ZA is preserved, along with the ZA matrix. - * PSTATE.SM is cleared, per SMSTOP, which does ResetSVEState. - */ + /* On syscall, PSTATE.ZA is preserved, PSTATE.SM is cleared. */ aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); - if (FIELD_EX64(env->svcr, SVCR, SM)) { - arm_rebuild_hflags(env); - } ret = do_syscall(env, env->xregs[8], env->xregs[0], diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c index a326a6def5..b265cfd470 100644 --- a/linux-user/aarch64/signal.c +++ b/linux-user/aarch64/signal.c @@ -667,9 +667,6 @@ static void target_setup_frame(int usig, struct target_sigaction *ka, /* Invoke the signal handler with both SM and ZA disabled. */ aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK); - if (env->svcr) { - arm_rebuild_hflags(env); - } if (info) { tswap_siginfo(&frame->info, info); diff --git a/target/arm/helper.c b/target/arm/helper.c index 26c3bb4cdf..cf77bdd378 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6735,6 +6735,9 @@ void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask) { uint64_t change = (env->svcr ^ new) & mask; + if (change == 0) { + return; + } env->svcr ^= change; if (change & R_SVCR_SM_MASK) { @@ -6752,6 +6755,8 @@ void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask) if (change & new & R_SVCR_ZA_MASK) { memset(env->zarray, 0, sizeof(env->zarray)); } + + arm_rebuild_hflags(env); } static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri, @@ -6760,7 +6765,6 @@ static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri, helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM)); helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA)); aarch64_set_svcr(env, value, -1); - arm_rebuild_hflags(env); } static void smcr_write(CPUARMState *env, const ARMCPRegInfo *ri, diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c index e146c17ba1..3abe03e4cb 100644 --- a/target/arm/sme_helper.c +++ b/target/arm/sme_helper.c @@ -31,20 +31,12 @@ void helper_set_pstate_sm(CPUARMState *env, uint32_t i) { - if (i == FIELD_EX64(env->svcr, SVCR, SM)) { - return; - } aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); - arm_rebuild_hflags(env); } void helper_set_pstate_za(CPUARMState *env, uint32_t i) { - if (i == FIELD_EX64(env->svcr, SVCR, ZA)) { - return; - } aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK); - arm_rebuild_hflags(env); } void helper_sme_zero(CPUARMState *env, uint32_t imm, uint32_t svl)