diff mbox series

[PULL,09/46] hw/mips/malta: Explicit GT64120 endianness upon device creation

Message ID 20230113154532.49979-10-philmd@linaro.org
State Accepted
Commit fae45dd53dcf4029e30b0915efcc62dfd56bdee0
Headers show
Series [PULL,01/46] hw/mips/malta: Split FPGA LEDs/ASCII display updates | expand

Commit Message

Philippe Mathieu-Daudé Jan. 13, 2023, 3:44 p.m. UTC 
Propagate the controller endianess from the machine, setting
the "cpu-little-endian" property.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221209151533.69516-6-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 hw/mips/malta.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index c8fc420e4f..f959bce673 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -1396,7 +1396,9 @@  void mips_malta_init(MachineState *machine)
     stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420);
 
     /* Northbridge */
-    dev = sysbus_create_simple("gt64120", -1, NULL);
+    dev = qdev_new("gt64120");
+    qdev_prop_set_bit(dev, "cpu-little-endian", !be);
+    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
     pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci"));
 
     /* Southbridge */